SAF-C161U-LF V1.3 Infineon Technologies, SAF-C161U-LF V1.3 Datasheet - Page 305

• Manufacturer Part Number: SAF-C161U-LF V1.3
• Description: IC MCU ISDN 16BIT TTL TQFP-100
• Manufacturer: Infineon Technologies
• Series: C16xxr

Specifications of SAF-C161U-LF V1.3

• Core Processor: C166
• Core Size: 16-Bit
• Speed: 36MHz
• Connectivity: EBI/EMI, SPI, UART/USART, USB
• Peripherals: POR, PWM, WDT
• Number Of I /o: 56
• Program Memory Type: ROMless
• Ram Size: 3K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-LFQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Other names: SAFC161ULFV1.3X; SAFC161ULFV13XP; SP000007502

14
The High-Speed Synchronous Serial Interface SSC provides flexible high-speed serial
communication between the C161U and other microcontrollers, microprocessors or
external peripherals.
SSC supports full-duplex and half-duplex synchronous communication up to 18 MBaud
in SSC Master Mode and 9 MBaud in SSC Slave Mode (@ 36 MHz CPU clock). The
serial clock signal can be generated by the SSC itself (master mode) or be received from
an external master (slave mode). Data width, shift direction, clock polarity and phase are
programmable. This allows communication with SPI-compatible devices. Transmission
and reception of data is double-buffered. A 16-bit baud rate generator provides the SSC
with a separate serial clock signal.
The high-speed synchronous serial interface can be configured in a very flexible way, so
it can be used with other synchronous serial interfaces (eg. the ASC in synchronous
mode), serve for master/slave or multimaster interconnections or operate compatible
with the popular SPI interface. So it can be used to communicate with shift registers (IO
expansion), peripherals (eg. EEPROMs etc.) or other controllers (networking). The SSC
supports half-duplex and full-duplex communication. Data is transmitted or received on
pins MTSR/P3.9 (Master Transmit / Slave Receive) and MRST/P3.8 (Master Receive /
Slave Transmit). The clock signal is output or input on pin SCLK/P3.13. These pins are
alternate functions of Port 3 pins.
Figure 96
Data Sheet
Ports & Direction Control
SSCCLC SSC Clock Control Register
ODP3
DP3
SSCBR
SSCTB
SSCTIC
Alternate Functions
SSCCLC
ODP3
DP3
P3
SCLK / P3.13
MTSR / P3.9
MRST / P3.8
System
Port 3 Open Drain Control Register
Port 3 Direction Control Register
SSC Baud Rate Generator/Reload Register
SSC Transmit Buffer Register
SSC Transmit Interrupt Control Register
High-Speed Synchronous Serial Interface
SFRs and Port Pins associated with the SSC
SSCBR
SSCTB
SSCRB
Data Registers
305
High-Speed Synchronous Serial Interface
P3
SSCCON SSC Control Register
SSCRB
SSCRIC
SSCEIC
Control Registers
SSCCON
Port 3 Data Register
SSC Receive Buffer Register
SSC Receive Interrupt Control Register
SSC Error Interrupt Control Register
Interrupt Control
SSCTIC
SSCRIC
SSCEIC
2001-04-19
C161U