SAF-C161U-LF V1.3 Infineon Technologies, SAF-C161U-LF V1.3 Datasheet - Page 402

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SAF-C161U-LF V1.3

Manufacturer Part Number
SAF-C161U-LF V1.3
Description
IC MCU ISDN 16BIT TTL TQFP-100
Manufacturer
Infineon Technologies
Series
C16xxr
Datasheet

Specifications of SAF-C161U-LF V1.3

Core Processor
C166
Core Size
16-Bit
Speed
36MHz
Connectivity
EBI/EMI, SPI, UART/USART, USB
Peripherals
POR, PWM, WDT
Number Of I /o
56
Program Memory Type
ROMless
Ram Size
3K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
100-LFQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-
Other names
SAFC161ULFV1.3X
SAFC161ULFV13XP
SP000007502
Data Sheet
The virtual stack addresses are transformed to physical stack addresses by
concatenating the significant bits of the stack pointer register SP (see table) with the
complementary most significant bits of the upper limit of the physical stack area
(00’FBFE
The reset values (STKOV=FA00
virtual stack area directly to the physical stack area and allow using the internal system
stack without any changes, provided that the 256 word area is not exceeded.
Figure 122
The following example demonstrates the circular stack mechanism which is also an
effect of this virtual stack mapping: First, register R1 is pushed onto the lowest physical
stack location according to the selected maximum stack size. With the following
instruction, register R2 will be pushed onto the highest physical stack location although
the SP is decremented by 2 as for the previous push operation.
MOV
...
PUSH R1
PUSH R2
The effect of the address transformation is that the physical stack addresses wrap
around from the end of the defined area to its beginning. When flushing and filling the
FBFE
FB80
FB80
FBFE
FBFE
FB7E
H
H
H
H
H
H
SP, #0F802H
H
1 1 1 1 1 0 1 1 1 1 1 1 1 1 1 0
1 1 1 1 1 0 1 1 1 0 0 0 0 0 0 0
1 1 1 1 1 0 1 1 1 0 0 0 0 0 0 0
1 1 1 1 1 0 1 1 1 1 1 1 1 1 1 0
1 1 1 1 1 0 1 1 1 1 1 1 1 1 1 0
1 1 1 1 1 0 1 1 0 1 1 1 1 1 1 0
After PUSH
). This transformation is done via hardware (see figure below).
Physical Stack Address Generation
64 words
;Set SP before last entry...
;...of physical stack of 256 words
;(SP)=F802H: Physical stack addr.=FA02H
;(SP)=F800H: Physical stack addr.=FA00H
;(SP)=F7FEH: Physical stack addr.=FBFEH
H
, STKUN=FC00
Stack Size
Phys.A.
Phys.A.
<SP>
<SP>
402
FBFE
FA00
F800
FBFE
FBFE
F7FE
H
, SP=FC00
H
H
H
H
H
H
1 1 1 1 1 0 1 1 1 1 1 1 1 1 1 0
1 1 1 1 1 0 1 0 0 0 0 0 0 0 0 0
1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0
After PUSH
1 1 1 1 1 0 1 1 1 1 1 1 1 1 1 0
1 1 1 1 1 0 1 1 1 1 1 1 1 1 1 0
1 1 1 1 0 1 1 1 1 1 1 1 1 1 1 0
H
, STKSZ=000
System Programming
256 words
B
2001-04-19
) map the
C161U

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