SAF-C161U-LF V1.3 Infineon Technologies, SAF-C161U-LF V1.3 Datasheet - Page 137

• Manufacturer Part Number: SAF-C161U-LF V1.3
• Description: IC MCU ISDN 16BIT TTL TQFP-100
• Manufacturer: Infineon Technologies
• Series: C16xxr

Specifications of SAF-C161U-LF V1.3

• Core Processor: C166
• Core Size: 16-Bit
• Speed: 36MHz
• Connectivity: EBI/EMI, SPI, UART/USART, USB
• Peripherals: POR, PWM, WDT
• Number Of I /o: 56
• Program Memory Type: ROMless
• Ram Size: 3K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-LFQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Other names: SAFC161ULFV1.3X; SAFC161ULFV13XP; SP000007502

Figure 27
In the C161U certain ports provide Open Drain Control, which allows to switch the output
driver of a port pin from a push/pull configuration to an open drain configuration. In push/
pull mode a port output driver has an upper and a lower transistor, thus it can actively
drive the line either to a high or a low level. In open drain mode the upper transistor is
always switched off, and the output driver can only actively drive the line to a low level.
When writing a ‘1’ to the port latch, the lower transistor is switched off and the output
enters a high-impedance state. The high level must then be provided by an external
pullup device. With this feature, it is possible to connect several port pins together to a
Wired-AND configuration, saving external glue logic and/or additional software overhead
for enabling/disabling output signals.
This feature is implemented for all ports except P0L, and is controlled through the
respective Open Drain Control Registers ODPx. These registers allow the individual bit-
wise selection of the open drain mode for each port line. If the respective control bit
ODPx.y is ‘0’ (default after reset), the output driver is in the push/pull mode. If ODPx.y is
‘1’, the open drain configuration is selected. Note that all ODPx registers are located in
the ESFR space.
Data Sheet
Data Input / Output
P0L
P0H
P1L
P1H
P2
P3
P4
P6
Registers
SFRs and Pins associated with the Parallel Ports
Direction Control
DP0L
DP0H
DP1L
DP1H
DP2
DP3
DP4
DP6
Registers
137
Open Drain Control
ODP0H
ODP1L
ODP1H
ODP2
ODP3
ODP4
ODP6
Registers
Pull Up/Down Control
PxPUDEN:
P0L, P0H, P1L,
P1H, P2, P3,
P4, P6
PxPUDSEL:
P0L, P0H, P1L,
P1H, P2, P3,
P4, P6
PxPHEN:
P0L, P0H, P1L,
P1H, P2, P3,
P4, P6
Registers
Parallel Ports
2001-04-19
C161U