SAF-C161U-LF V1.3 Infineon Technologies, SAF-C161U-LF V1.3 Datasheet - Page 311

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SAF-C161U-LF V1.3

Manufacturer Part Number
SAF-C161U-LF V1.3
Description
IC MCU ISDN 16BIT TTL TQFP-100
Manufacturer
Infineon Technologies
Series
C16xxr
Datasheet

Specifications of SAF-C161U-LF V1.3

Core Processor
C166
Core Size
16-Bit
Speed
36MHz
Connectivity
EBI/EMI, SPI, UART/USART, USB
Peripherals
POR, PWM, WDT
Number Of I /o
56
Program Memory Type
ROMless
Ram Size
3K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
100-LFQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-
Other names
SAFC161ULFV1.3X
SAFC161ULFV13XP
SP000007502
Figure 99
The data output pins MRST of all slave devices are connected together onto the one
receive line in this configuration. During a transfer each slave shifts out data from its shift
register. There are two ways to avoid collisions on the receive line due to different slave
data:
Only one slave drives the line, ie. enables the driver of its MRST pin. All the other
slaves have to program there MRST pins to input. So only one slave can put its data onto
the master's receive line. Only receiving of data from the master is possible. The master
selects the slave device from which it expects data either by separate select lines, or by
sending a special command to this slave. The selected slave then switches its MRST line
to output, until it gets a deselection signal or command.
Slaves use open drain output on MRST. This forms a Wired-AND connection. The
receive line needs an external pullup in this case. Corruption of the data on the receive
line sent by the selected slave is avoided, when all slaves which are not selected for
transmission to the master only send ones (‘1’). Since this high level is not actively driven
onto the line, but only held through the pullup device, the selected slave can pull this line
actively to a low level when transmitting a zero bit. The master selects the slave device
Data Sheet
Master
Shift Register
SSC Full Duplex Configuration
Clock
Device #1
MTSR
SCLK
MRST
Receive
Clock
Transmit
311
High-Speed Synchronous Serial Interface
Device #2
Device #3
MTSR
MTSR
SCLK
SCLK
MRST
MRST
Clock
Clock
Shift Register
Shift Register
2001-04-19
MCS01963
C161U
Slave
Slave

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