SAF-C161U-LF V1.3 Infineon Technologies, SAF-C161U-LF V1.3 Datasheet - Page 384

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SAF-C161U-LF V1.3

Manufacturer Part Number
SAF-C161U-LF V1.3
Description
IC MCU ISDN 16BIT TTL TQFP-100
Manufacturer
Infineon Technologies
Series
C16xxr
Datasheet

Specifications of SAF-C161U-LF V1.3

Core Processor
C166
Core Size
16-Bit
Speed
36MHz
Connectivity
EBI/EMI, SPI, UART/USART, USB
Peripherals
POR, PWM, WDT
Number Of I /o
56
Program Memory Type
ROMless
Ram Size
3K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
100-LFQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-
Other names
SAFC161ULFV1.3X
SAFC161ULFV13XP
SP000007502
Data Sheet
Note: CSCU provides per XPERCON bit one enable signal for XPER visibility control.
20.4
20.4.1
System Control Unit CSCU provides two different protection types of registers:
• Unprotected Registers
• Protectable Registers
The unprotected registers allow reading and writing (if not read-only) of register values
without any restrictions. However, the write access of the protectable registers (security
registers) can be programmed for three different modes of security level, whereas the
read access is always unprotected:
• Write Protected Mode
• Low Protected Mode
• Unprotected Mode
In write protected mode the registers can not be accessed by a write command. However
in low protected mode the registers can be written with a special command sequence
(see desription below). If the registers are set to unprotected mode, all write accesses
are possible.
Some register controlled functions and modes which are critical for the C161U’s
operation are locked after the execution of EINIT, so these vital system functions cannot
be changed inadvertently eg. by software errors. However, as these security registers
control also the power management they need to be accessed during operation to select
the appropriate mode.
The switching between the different security levels is controlled by a state machine. Via
a password and a command sequence the security levels can be changed. After reset
always the unprotected mode is automatically selected. The EINIT command switches
the security level automatically to protected mode.
The low protected mode is especially important for a standby state of the application.
This mode allows fast accesses within two commands to the protected registers without
removing the protection completely.
Bit Field
reserved
These enable signals are routed to the core to be combined with selectable (per
module pins) BUSACT functions of XBCON registers.
System Control Block
Register Write Protection
Bits
4..0
Type Value Description
rw
0
These bits are reserved and must be set to
Zero
384
System Control Unit (CSCU)
2001-04-19
C161U

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