SAF-C161U-LF V1.3 Infineon Technologies, SAF-C161U-LF V1.3 Datasheet - Page 440

• Manufacturer Part Number: SAF-C161U-LF V1.3
• Description: IC MCU ISDN 16BIT TTL TQFP-100
• Manufacturer: Infineon Technologies
• Series: C16xxr

Specifications of SAF-C161U-LF V1.3

• Core Processor: C166
• Core Size: 16-Bit
• Speed: 36MHz
• Connectivity: EBI/EMI, SPI, UART/USART, USB
• Peripherals: POR, PWM, WDT
• Number Of I /o: 56
• Program Memory Type: ROMless
• Ram Size: 3K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-LFQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Other names: SAFC161ULFV1.3X; SAFC161ULFV13XP; SP000007502

Data Sheet
• Unconditional jumping to an absolutely addressed target instruction within any code
• Conditional jumping to a relatively addressed target instruction within the current code
• Conditional jumping to a relatively addressed target instruction within the current code
Call Instructions
• Conditional calling of an either absolutely or indirectly addressed subroutine within
• Unconditional calling of a relatively addressed subroutine within the current code
• Unconditional calling of an absolutely addressed subroutine within any code segment:
• Unconditional calling of an absolutely addressed subroutine within the current code
• Unconditional branching to the interrupt or trap vector jump table in code segment 0:
Return Instructions
• Returning from a subroutine within the current code segment: RET
• Returning from a subroutine within any code segment: ETS
• Returning from a subroutine within the current code segment plus an additional
• Returning from an interrupt service routine: RETI
System Control Instructions
• Resetting the C161U via software: SRST
• Entering the Idle mode: DLE
• Entering the Power-down mode: PWRDN
• Servicing the Watchdog Timer: SRVWDT
• Disabling the Watchdog Timer: DISWDT
• Signifying the end of the initialization routine (pulls pin RSTOUT high, and disables the
segment: JMPS
segment depending on the state of a selectable bit: JB, JNB
segment depending on the state of a selectable bit with a post-inversion of the tested
bit in case of jump taken (semaphore support): JBC, JNBS
the current code segment: CALLA, CALLI
segment: CALLR
CALLS
segment plus an additional pushing of a selectable register ontothe system stack:
PCALL
TRAP
popping of a selectable register from the system stack: RETP
effect of any later execution of a DISWDT instruction): EINIT
440
Instruction Set Summary
2001-04-19
C161U