SAF-C161U-LF V1.3 Infineon Technologies, SAF-C161U-LF V1.3 Datasheet - Page 324

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SAF-C161U-LF V1.3

Manufacturer Part Number
SAF-C161U-LF V1.3
Description
IC MCU ISDN 16BIT TTL TQFP-100
Manufacturer
Infineon Technologies
Series
C16xxr
Datasheet

Specifications of SAF-C161U-LF V1.3

Core Processor
C166
Core Size
16-Bit
Speed
36MHz
Connectivity
EBI/EMI, SPI, UART/USART, USB
Peripherals
POR, PWM, WDT
Number Of I /o
56
Program Memory Type
ROMless
Ram Size
3K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
100-LFQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-
Other names
SAFC161ULFV1.3X
SAFC161ULFV13XP
SP000007502
Data Sheet
Figure 102
Data requested by Transmit FIFOs (including control IN packets following SETUP
packets) will be transferred from an internal/external memory location to the endpoint
FIFO by the EPEC injecting MOV-instructions into the decode stage of the instruction
pipeline.
Data available by Receive FIFOs (including control OUT packets following SETUP
packets) will be transferred from the endpoint FIFO to an internal/external memory
Application Bus
DEV_DATA
UDC_DATA
TX_DIR_CTRL
RX_DIR_CTRL
USBD basic FIFO/Control structure
USBD
Control
3
3
7
0
0
7
8
8
8
8
8
8
8
USBD_INT_TXREQn (to EPEC)
USBD_INT_RXDONEn (to CPU)
USBD_INT_RXREQn (to EPEC)
EPEC_DONEn (from EPEC)
USBD_INT_TXDONEn (to CPU)
Endpoint#7
Endpoint#1..6
Endpoint#0
8-byte Transmit FIFO (IN)
8-byte Receive FIFO (OUT)
10-bit packet byte counter
324
Setup Register #0
Setup Register #1
Setup Register #2
Setup Register #3
USB Interface Controller
USBD_TXWRn
USBD_RXRDn
SFR
SFR
16
16
low
byte
low
byte
high
byte
high
byte
2001-04-19
C161U
XBUS

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