SAF-C161U-LF V1.3 Infineon Technologies, SAF-C161U-LF V1.3 Datasheet - Page 204

• Manufacturer Part Number: SAF-C161U-LF V1.3
• Description: IC MCU ISDN 16BIT TTL TQFP-100
• Manufacturer: Infineon Technologies
• Series: C16xxr

Specifications of SAF-C161U-LF V1.3

• Core Processor: C166
• Core Size: 16-Bit
• Speed: 36MHz
• Connectivity: EBI/EMI, SPI, UART/USART, USB
• Peripherals: POR, PWM, WDT
• Number Of I /o: 56
• Program Memory Type: ROMless
• Ram Size: 3K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-LFQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Other names: SAFC161ULFV1.3X; SAFC161ULFV13XP; SP000007502

Data Sheet
Note: All XADRSx/ADDRSELx registers as well as XBCONx/BUSCONx registers are
Note: The respective SFR addresses of XBCON registers can be found in list of SFRs.
Note: Within the C161U, register XBCON2 is related to the USB module and register
Address Window Arbitration
For each access the EBC compares the current address with all address select registers
(programmable ADDRSELx and hardwired XADRSx). This comparison is done in four
levels.
Priority 1:The XADRSx registers are evaluated first. A match with one of these registers
directs the access to the respective X-Peripheral using the corresponding XBCONx
register and ignoring all other ADDRSELx registers.
Priority 2:Registers ADDRSEL2 and ADDRSEL4 are evaluated before ADDRSEL1 and
ADDRSEL3, respectively. A match with one of these registers directs the access to the
respective external area using the corresponding BUSCONx register and ignoring
registers ADDRSEL1/3 (see figure below).
Priority 3:A match with registers ADDRSEL1 or ADDRSEL3 directs the access to the
respective external area using the corresponding BUSCONx register.
Priority 4:If there is no match with any XADRSx or ADDRSELx register the access to
the external bus uses register BUSCON0.
Figure 53
XBCON0
BUSCON2
BUSCON1
BUSCON0
user programmable SFR registers. All BUSCONx registers are mapped into the
bitaddressable SFR memory space, all XBCONx registers are located in the
bitaddressable ESFR memory space. Although they are free programmable,
programming should be performed during the initialisation phase before the first
accesses are controlled with XBCONx or BUSCONx.
XBCON2 is related to the EPEC module. For configuration, please also refer to
Chapter 10.8, "Initialization of the C161U’s X-peripherals" on page 212.
Address Window Arbitration
BUSCON4
BUSCON3
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External Bus Interface
2001-04-19
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