SAF-C161U-LF V1.3 Infineon Technologies, SAF-C161U-LF V1.3 Datasheet - Page 272

• Manufacturer Part Number: SAF-C161U-LF V1.3
• Description: IC MCU ISDN 16BIT TTL TQFP-100
• Manufacturer: Infineon Technologies
• Series: C16xxr

Specifications of SAF-C161U-LF V1.3

• Core Processor: C166
• Core Size: 16-Bit
• Speed: 36MHz
• Connectivity: EBI/EMI, SPI, UART/USART, USB
• Peripherals: POR, PWM, WDT
• Number Of I /o: 56
• Program Memory Type: ROMless
• Ram Size: 3K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-LFQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Other names: SAFC161ULFV1.3X; SAFC161ULFV13XP; SP000007502

Data Sheet
width of 3/16 of the bit time. The ASC also allows to program the length of the IrDA high
pulse. Further, the polarity of the received IrDA pulse cane be inverted in IrAD mode.
Figure 81 shows the non-inverted IrDA pulse scheme.
Figure 81
12.1.5.2 Asynchronous Transmission
Asynchronous transmission begins at the next overflow of the divide-by-16 baudrate
timer (transition of the baudrate clock f
loaded into S0TBUF. The transmitted data frame consists of three basic elements:
the start bit
the data field (8 or 9 bits, LSB first, including a parity bit, if selected)
the delimiter (1 or 2 stop bits)
Data transmission is double buffered. When the transmitter is idle, the transmit data
loaded into register S0TBUF is immediately moved to the transmit shift register thus
freeing S0TBUF for the next data to be sent. This is indicated by the transmit buffer
interrupt request line TBIR being activated. S0TBUF may now be loaded with the next
data, while transmission of the previous one is still going on.
The transmit interrupt request line TIR will be activated before the last bit of a frame is
transmitted, ie. before the first or the second stop bit is shifted out of the transmit shift
register.
The transmitter output pin P3.10/TXD must be configured for alternate data output’.
IrDA Frame Encoding/Decoding
Start
Start
Time
0
Bit
Bit
Bit
0
1
1
0
0
1
1
UART Frame
8 Data Bits
8 Data Bits
BR
0
IR Frame
0
272
1/2 Bit Time
), if bit S0CON.R is set and data has been
0
Asynchronous/Synchr. Serial Interface
0
1
1
1
1
0
0
Stop
Stop
1
Bit
Bit
1
Pulse Width =
3/16 Bit Time
(or variable length)
2001-04-19
C161U