SAF-C161U-LF V1.3 Infineon Technologies, SAF-C161U-LF V1.3 Datasheet - Page 349

• Manufacturer Part Number: SAF-C161U-LF V1.3
• Description: IC MCU ISDN 16BIT TTL TQFP-100
• Manufacturer: Infineon Technologies
• Series: C16xxr

Specifications of SAF-C161U-LF V1.3

• Core Processor: C166
• Core Size: 16-Bit
• Speed: 36MHz
• Connectivity: EBI/EMI, SPI, UART/USART, USB
• Peripherals: POR, PWM, WDT
• Number Of I /o: 56
• Program Memory Type: ROMless
• Ram Size: 3K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-LFQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Other names: SAFC161ULFV1.3X; SAFC161ULFV13XP; SP000007502

If an endpoint was stalled during a in-transfer, this transfer will be finished and the next
request by the host will return a stall-handshake. If there is data in the fifo for transission,
the data will be kept and sent, if the stall-condition is abolished and host requests for this
data.
A stall-condition during an out-transfer will finish first and the next request will return a
stall-handshake.
Endpoint zero has only one stall-bit for both directions, for in and out. A stall on one
direction will also lead to a stall in the other transfer-direction.
15.7.8
Host sends a Start of Frame-(SOF)-signal every ms. A SOF-interrupt is generated and
the value of the actual frame-number is stored in the SOF-register. There is no overwirte-
protection on this register, the value is always updated if a valid SOF-packid is received.
15.7.9
In normal operation, there is the UDC-clock of 48 MHz enabled and the normal CPU-
clock which may vary according to the divider in the clock-generation-unit.
If the host is sending a suspend-request (by driving an idle-state for more than 6 ms),
after 6 ms the suspend-interrupt will be generated. This must cause SW to go in low-
power mode. There are different modes in which the chip can be set. According to the
mode the wakeup initiated by the host, must be detected differently:
• Using the bit 0 in clc register of every peripheral to turn off the clock. The suspendoff
• Using the SYSCON3 register to turn off the clock of xbus and pdbus peripherals
• Using the SYSCON3 register group disable (msb of the register) to turn off all the xbus
• Going into sleep mode which stops program execution and turns off the clock for most
If SW wants to send a device-wakeup this feature must have been enabled by the host.
Whether this feature was enabled or not, is reflected in the STATUS3 register. If this
feature is enabled, and SW wants to wake up the USB, it must turn on the clocks and
Data Sheet
interrupt is generated even though the rest of the usbblk is turned off.
(peripheral disable only). The SYSCON3 register is a write protected register and SW
first must go into low protected mode to be able to do this (see page 393 for
SYSCON3 register description). In this mode also, the suspendoff interrupt is
generated.
and pdbus peripherals. In this mode, the normal suspendoff interrupt is not generated,
wakeup must be done with the falling edge of the fast external interrupt alternate
function firq_alt(5).
of the entire chip. In this mode the fast external interrupt alternate function firq_alt(5)
is also generated and will wakeup the cpu. Program execution will start with the
interrupt procedure of the interrupt, or, if SW was in an interrupt routine with a higher
priority before, program execution will continue at the point, it was stopped.
Start of Frame
Suspend and Suspendoff
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USB Interface Controller
2001-04-19
C161U