SAF-C161U-LF V1.3 Infineon Technologies, SAF-C161U-LF V1.3 Datasheet - Page 198

• Manufacturer Part Number: SAF-C161U-LF V1.3
• Description: IC MCU ISDN 16BIT TTL TQFP-100
• Manufacturer: Infineon Technologies
• Series: C16xxr

Specifications of SAF-C161U-LF V1.3

• Core Processor: C166
• Core Size: 16-Bit
• Speed: 36MHz
• Connectivity: EBI/EMI, SPI, UART/USART, USB
• Peripherals: POR, PWM, WDT
• Number Of I /o: 56
• Program Memory Type: ROMless
• Ram Size: 3K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-LFQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Other names: SAFC161ULFV1.3X; SAFC161ULFV13XP; SP000007502

Data Sheet
Bus Access Control
CPU accesses to internal and external busses, e.g. to internal or external memories or
peripherals, are controlled with the respective address ranges. These address ranges
are supported by ’chip select’ functions for XBUS resources or for external off-chip
resources. In the C161U six address ranges with according bus definitions can be
programmed for XBUS peripherals (including memories) and additionally five ranges for
external bus peripherals.
Note: In contrast to previous Infineon devices the XADRS/XBCON registers are not
Address ranges and address mapping of memories or peripherals on XBUS or external
bus are controlled with the address selection registers XADRSx for XBUS and
ADDRSELx for external bus. The respective bus type definitions are controlled with
registers XBCONx and BUSCONx.
In comparison to previous devices, C161U has 3 more address selection registers for
XBUS:
• The new register pair XADRS4 / XBCON4 use the same standard scheme of address
• The new register pairs XADRS5 / XBCON5 and XADRS6 / XBCON6 control address
After reset, no address selection register is selected; thus the default address range is
enabled and controlled with BUSCON0 and additionally the chip select output CS0 is
activated (as in standard C16x architecture).
selection and XCS control as the XADRS1-3 registers; smallest possible address
range is 256 bytes.
selections as defined for external peripherals (as contolled by ADDRSEL); thus,
mapping of XPER addresses to the total address space is provided, with smallest
possible address range of 4 KBytes. XBCON5/6 and XCS5/6 control are identical to
the standard XBUS address ranges.
hardwired but fully programmable.
198
External Bus Interface
2001-04-19
C161U