SAF-C161U-LF V1.3 Infineon Technologies, SAF-C161U-LF V1.3 Datasheet - Page 382

• Manufacturer Part Number: SAF-C161U-LF V1.3
• Description: IC MCU ISDN 16BIT TTL TQFP-100
• Manufacturer: Infineon Technologies
• Series: C16xxr

Specifications of SAF-C161U-LF V1.3

• Core Processor: C166
• Core Size: 16-Bit
• Speed: 36MHz
• Connectivity: EBI/EMI, SPI, UART/USART, USB
• Peripherals: POR, PWM, WDT
• Number Of I /o: 56
• Program Memory Type: ROMless
• Ram Size: 3K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-LFQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Other names: SAFC161ULFV1.3X; SAFC161ULFV13XP; SP000007502

Data Sheet
Note:
1. In parallel to the XPER control with XPERCON register, the visibility of XPER address
2. The XPER configuration is additionally controlled by means of flexible peripheral
Register in XPER Configuration Block:
System Control Block
This block has several system management functions.
System Control Block controls the system register write protection, introduced for the
system control registers SYSCON1-3.
Note: The new register write protection especially supports modularity of design, and is
Additional control functions of the System Control Block:
The System Control Block provides the following registers:
Register
XPERCON
Register
SCUSLC
SCUSLS
EXICON
EXISEL
ISNC
FOCON
spaces also is controlled with the BUSACT bits in respective XBCON registers (in the
C166 core)
management control (see Peripheral Management Module below) for power
reduction.
– Control of fast external interrupt inputs
– Control of external interrupt source selection
– Control of interrupt subnode for PLL and realtime clock interrupts
– Control of spike suppression for fast external interrupts and NMI in Sleep mode
– Clock output frequency control
therefore not compatible with the previously known C16x release function, using
the release bitfield in SYSCON2 for write protection.
Description
XBUS peripheral control of XPER visibility
Description
SCU security level command register
SCU security level status and password register
External interrupt control register (see Chapter 7.8.1, page 127)
External interrupt source selection control register (see Chapter 7.8.2,
page 128)
Interrupt subnode control register (see Chapter 7.8.3, page 129)
Frequency output control register
382
System Control Unit (CSCU)
:
2001-04-19
C161U