SAF-C161U-LF V1.3 Infineon Technologies, SAF-C161U-LF V1.3 Datasheet - Page 50

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SAF-C161U-LF V1.3

Manufacturer Part Number
SAF-C161U-LF V1.3
Description
IC MCU ISDN 16BIT TTL TQFP-100
Manufacturer
Infineon Technologies
Series
C16xxr
Datasheet

Specifications of SAF-C161U-LF V1.3

Core Processor
C166
Core Size
16-Bit
Speed
36MHz
Connectivity
EBI/EMI, SPI, UART/USART, USB
Peripherals
POR, PWM, WDT
Number Of I /o
56
Program Memory Type
ROMless
Ram Size
3K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
100-LFQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-
Other names
SAFC161ULFV1.3X
SAFC161ULFV13XP
SP000007502
Data Sheet
by the Context Pointer register (CP) is active at a given time, however. Selecting a new
active register bank is simply done by updating the CP register. A particular Switch
Context (SCXT) instruction performs register bank switching and an automatic saving of
the previous context. The number of implemented register banks (arbitrary sizes) is only
limited by the size of the available internal RAM.
Details on using, switching and overlapping register banks are described in chapter
“System Programming”.
PEC Source and Destination Pointers
The 16 word locations in the internal RAM from 00’FCE0
bit-addressable section) are provided as source and destination address pointers for
data transfers on the eight PEC channels. Each channel uses a pair of pointers stored
in two subsequent word locations with the source pointer (SRCPx) on the lower and the
destination pointer (DSTPx) on the higher word address (x = 7...0).
Figure 11
00’FCFE H
00’FCFC
00’FCE2
00’FCE0 H
H
H
Location of the PEC Pointers
PEC
Source
and
Destination
Pointers
DSTP7
SRCP7
DSTP0
SRCP0
50
H
to 00’FCFE
Internal
RAM
Memory Organization
MCD03903
H
(just below the
00’FD00
00’FCFE
00’FCE0
00’FCDE
00’F600
00’F5FE
2001-04-19
C161U
H
H
H
H
H
H

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