SAF-C161U-LF V1.3 Infineon Technologies, SAF-C161U-LF V1.3 Datasheet - Page 327

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SAF-C161U-LF V1.3

Manufacturer Part Number
SAF-C161U-LF V1.3
Description
IC MCU ISDN 16BIT TTL TQFP-100
Manufacturer
Infineon Technologies
Series
C16xxr
Datasheet

Specifications of SAF-C161U-LF V1.3

Core Processor
C166
Core Size
16-Bit
Speed
36MHz
Connectivity
EBI/EMI, SPI, UART/USART, USB
Peripherals
POR, PWM, WDT
Number Of I /o
56
Program Memory Type
ROMless
Ram Size
3K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
100-LFQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-
Other names
SAFC161ULFV1.3X
SAFC161ULFV13XP
SP000007502
Figure 104
Whether the last EPEC transfer was a word or byte transfer will be indicated by a
USBD_RXBYTECNT value, which will be read by SW.
By this mechanism only a minimum of SW transaction will be required which guarantees
minimum latency times for the UDC handshake procedure.
Control Endpoint 0
The default control pipe is reserved to Endpoint 0. The host communicates over the
control endpoint in order to retrieve device information, device configurations, interfaces,
alternate settings and other device endpoint characteristics. Control endpoints are
bidirectional and the data delivery will be guaranteed.
The hosts starts with an 8-bytes SETUP packet, which will be written to the SETUP
register bank USBD_Setup(3:0). A SETUP interrupt request will inform the CPU in order
to process the SETUP packet if the packet was received without any errors. A pending/
processing SETUP request, which will be overwritten by the host, has to be retired by
the device SW.
In the bidirectional data stage, optional data packets can be read/written by the host
through the 8-bytes bidirectional Endpoint 0 FIFO.
Data Sheet
Read RXBYTECNT
Write to head of
packet
USB OUT-Transfer controlled by SW
USBD_INT_RX_DONE
ISR active
from USBD
IDLE
ByteCount, SrcPtr,
USBD_INT_RX_DONE
program EPEC:
DestPtr
Polling active
327
Poll
USBD_INT_RX_DONE
Receive
Timeout Error
= ’1’
to buffer complete
Packet transfer
Timer expired
USB Interface Controller
USBD_INT_RX_DONE
busy with
previous packet
EPEC or FIFO
= ’0’
Reset
2001-04-19
C161U

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