SAF-C161U-LF V1.3 Infineon Technologies, SAF-C161U-LF V1.3 Datasheet - Page 129

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SAF-C161U-LF V1.3

Manufacturer Part Number
SAF-C161U-LF V1.3
Description
IC MCU ISDN 16BIT TTL TQFP-100
Manufacturer
Infineon Technologies
Series
C16xxr
Datasheet

Specifications of SAF-C161U-LF V1.3

Core Processor
C166
Core Size
16-Bit
Speed
36MHz
Connectivity
EBI/EMI, SPI, UART/USART, USB
Peripherals
POR, PWM, WDT
Number Of I /o
56
Program Memory Type
ROMless
Ram Size
3K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
100-LFQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-
Other names
SAFC161ULFV1.3X
SAFC161ULFV13XP
SP000007502
7.8.3
The Real Time Clock (RTC) interrupt T14INT and the PLL/OWD interrupt share one
interrupt node, the XPER3 interrupt node. In order to enable the interrupt handler to
determine the source of that shared interrupt request, the subnode interrupt control
register ISNC is provided. The separate interrupt request and enable flags of register
ISNC (see below) for the PLL (PLLIR, PLLIE) as well as for the RTC (T14IR, T14IE) are
used as shown in Figure 26.
Figure 26
Data Sheet
Bit
EXI6SS
EXI7SS
Note: The Interrupt Service Routine must clear the IR flag in register ISNC manually.
T14INT
PLLINT
Otherwise no further interrupts can be detected.
All request flags are bit protected.
Interrupt Subnode Control
Interrupt Subnode Control for PLL / RTC Interrupts
0 0: Must be set to ’00’.
0 0: Not allowed.
Function
0 1: Not allowed.
1 0: Not allowed.
1 1: Not allowed.
0 1: Input from source RTC_INT.
1 0: Not allowed.
1 1: Not allowed.
Diff.
Circuit
Diff.
Circuit
ISNC
PLL
PLL
T14
IR
T14
IR
IE
IE
1)
1)
129
&
&
Interrupt and Trap Functions
1
Pulse
Generation
2001-04-19
INT
C161U

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