SAF-C161U-LF V1.3 Infineon Technologies, SAF-C161U-LF V1.3 Datasheet - Page 121

• Manufacturer Part Number: SAF-C161U-LF V1.3
• Description: IC MCU ISDN 16BIT TTL TQFP-100
• Manufacturer: Infineon Technologies
• Series: C16xxr

Specifications of SAF-C161U-LF V1.3

• Core Processor: C166
• Core Size: 16-Bit
• Speed: 36MHz
• Connectivity: EBI/EMI, SPI, UART/USART, USB
• Peripherals: POR, PWM, WDT
• Number Of I /o: 56
• Program Memory Type: ROMless
• Ram Size: 3K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-LFQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Other names: SAFC161ULFV1.3X; SAFC161ULFV13XP; SP000007502

C161U
Interrupt and Trap Functions
When the interrupt service routine is left (RETI is executed), the status information is
popped from the system stack in the reverse order, taking into account the value of bit
SGTDIS.
Context Switching
An interrupt service routine usually saves all the registers it uses on the stack, and
restores them before returning. The more registers a routine uses, the more time is
wasted with saving and restoring. C161U allows to switch the complete bank of CPU
registers (GPRs) with a single instruction, so the service routine executes within its own,
separate context.
The instruction “SCXT CP, #New_Bank” pushes the content of the context pointer (CP)
on the system stack and loads CP with the immediate value “New_Bank”, which selects
a new register bank. The service routine may now use its “own registers”. This register
bank is preserved, when the service routine terminates, ie. its contents are available on
the next call.
Before returning (RETI) the previous CP is simply POPped from the system stack, which
returns the registers to the original bank.
Note: The first instruction following the SCXT instruction must not use a GPR.
Resources that are used by the interrupting program must eventually be saved and
restored, eg. the DPPs and the registers of the MUL/DIV unit.
Data Sheet
121
2001-04-19