SAF-C161U-LF V1.3 Infineon Technologies, SAF-C161U-LF V1.3 Datasheet - Page 373

• Manufacturer Part Number: SAF-C161U-LF V1.3
• Description: IC MCU ISDN 16BIT TTL TQFP-100
• Manufacturer: Infineon Technologies
• Series: C16xxr

Specifications of SAF-C161U-LF V1.3

• Core Processor: C166
• Core Size: 16-Bit
• Speed: 36MHz
• Connectivity: EBI/EMI, SPI, UART/USART, USB
• Peripherals: POR, PWM, WDT
• Number Of I /o: 56
• Program Memory Type: ROMless
• Ram Size: 3K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-LFQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Other names: SAFC161ULFV1.3X; SAFC161ULFV13XP; SP000007502

Figure 117
Idle mode can also be terminated by a Non-Maskable Interrupt, ie. a high to low transition
on the NMI pin. After Idle mode has been terminated by an interrupt or NMI request, the
interrupt system performs a round of prioritization to determine the highest priority
request. In the case of an NMI request, the NMI trap will always be entered.
Any interrupt request whose individual Interrupt Enable flag was set before Idle mode
was entered will terminate Idle mode regardless of the current CPU priority. The CPU
will not go back into Idle mode when a CPU interrupt request is detected, even when the
interrupt was not serviced because of a higher CPU priority or a globally disabled
interrupt system (IEN=’0’). The CPU will only go back into Idle mode when the interrupt
system is globally enabled (IEN=’1’) and a PEC service on a priority level higher than
the current CPU level is requested and executed.
Note: An interrupt request which is individually enabled and assigned to priority level 0
The watchdog timer may be used to monitor the Idle mode: an internal reset will be
generated if no interrupt or NMI request occurs before the watchdog timer overflows. To
prevent the watchdog timer from overflowing during Idle mode it must be programmed
to a reasonable time interval before Idle mode is entered.,
The standard Idle mode can be additionally configured by programming the SYSCON3
register, using the flexible peripheral management functions. This is especially
advantages, because it is thus possible to activate only these peripherals also in Idle
mode which are really required for standby operation or for wakeup, reducing power
consumption to the absolute minimum for a specific peripheral operation during Idle
mode.
Data Sheet
will terminate Idle mode. The associated interrupt vector will not be accessed,
however.
Active
Transitions between Idle mode and active mode
Mode
CPU Interrupt Request
Denied PEC Request
IDLE instruction
373
denied
accepted
Power Reduction Modes
Mode
Idle
PEC Request
Executed
2001-04-19
C161U