SAF-C161U-LF V1.3 Infineon Technologies, SAF-C161U-LF V1.3 Datasheet - Page 404

• Manufacturer Part Number: SAF-C161U-LF V1.3
• Description: IC MCU ISDN 16BIT TTL TQFP-100
• Manufacturer: Infineon Technologies
• Series: C16xxr

Specifications of SAF-C161U-LF V1.3

• Core Processor: C166
• Core Size: 16-Bit
• Speed: 36MHz
• Connectivity: EBI/EMI, SPI, UART/USART, USB
• Peripherals: POR, PWM, WDT
• Number Of I /o: 56
• Program Memory Type: ROMless
• Ram Size: 3K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-LFQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Other names: SAFC161ULFV1.3X; SAFC161ULFV13XP; SP000007502

Data Sheet
consumed by the system stack is defined via the STKUN and STKOV pointers. The
underflow and overflow traps in this case serve for fatal error detection only.
For the linear stack option all modifiable bits of register SP are used to access the
physical stack. Although the stack pointer may cover addresses from 00’F000
00’FFFE
therefore may only use the address range 00’F600
responsibility to restrict the system stack to the internal RAM range.
Note: Avoid stack accesses below the IRAM area (ESFR space and reserved area) and
User Stacks
User stacks provide the ability to create task specific data stacks and to off-load data
from the system stack. The user may push both bytes and words onto a user stack, but
is responsible for using the appropriate instructions when popping data from the specific
user stack. No hardware detection of overflow or underflow of a user stack is provided.
The following addressing modes allow implementation of user stacks:
[– Rw], Rb or [– Rw], Rw: Pre-decrement Indirect Addressing.
Used to push one byte or word onto a user stack. This mode is only available for MOV
instructions and can specify any GPR as the user stack pointer.
Rb, [Rw+] or Rw, [Rw+]: Post-increment Index Register Indirect Addressing.
Used to pop one byte or word from a user stack. This mode is available to most
instructions, but only GPRs R0-R3 can be specified as the user stack pointer.
Rb, [Rw+] or Rw, [Rw+]: Post-increment Indirect Addressing.
Used to pop one byte or word from a user stack. This mode is only available for MOV
instructions and can specify any GPR as the user stack pointer.
21.2
Register banking provides the user with an extremely fast method to switch user context.
A single machine cycle instruction saves the old bank and enters a new register bank.
Each register bank may assign up to 16 registers. Each register bank should be
allocated during coding based on the needs of each task. Once the internal memory has
been partitioned into a register bank space, internal stack space and a global internal
memory area, each bank pointer is then assigned. Thus, upon entry into a new task, the
appropriate bank pointer is used as the operand for the SCXT (switch context)
instruction. Upon exit from a task a simple POP instruction to the context pointer (CP)
restores the previous task's register bank.
within address range 00’FE00
Otherwise unpredictable results will occur.
H
the (physical) system stack must be located within the internal RAM and
Register Banking
H
and 00’FFFE
404
H
(SFR space).
H
to 00’FDFE
System Programming
H
. It is the user’s
2001-04-19
C161U
H
up to