SAF-C161U-LF V1.3 Infineon Technologies, SAF-C161U-LF V1.3 Datasheet - Page 150

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SAF-C161U-LF V1.3

Manufacturer Part Number
SAF-C161U-LF V1.3
Description
IC MCU ISDN 16BIT TTL TQFP-100
Manufacturer
Infineon Technologies
Series
C16xxr
Datasheet

Specifications of SAF-C161U-LF V1.3

Core Processor
C166
Core Size
16-Bit
Speed
36MHz
Connectivity
EBI/EMI, SPI, UART/USART, USB
Peripherals
POR, PWM, WDT
Number Of I /o
56
Program Memory Type
ROMless
Ram Size
3K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
100-LFQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-
Other names
SAFC161ULFV1.3X
SAFC161ULFV13XP
SP000007502
Data Sheet
P1LPUDEN (FE70
P1HPUDEN (FE72
P1LPHEN (FE74
P1HPHEN (FE76
Bit
P1xPUDEN.y
Bit
P1xPHEN.y
15
15
15
15
-
-
-
-
14
14
14
14
-
-
-
-
13
13
13
13
-
-
-
-
H
H
Function
Output Driver Enable in Power Down Mode
P1xPHEN.y = 0: output driver is disabled in power down mode
P1xPHEN.y = 1: output driver is enabled in power down mode
H
Function
Pulldown/Pullup Enable
P1xPUDEN.y = 0: internal programmable pull transistor is disabled
P1xPUDEN.y = 1: internal programmable pull transistor is enabled
/ 3A
H
/ 3B
12
12
12
12
/ 38
-
-
-
-
/ 39
H
H
)
H
)
H
)
)
11
11
11
11
-
-
-
-
10
10
10
10
-
-
-
-
9
9
9
9
-
-
-
-
8
8
8
8
-
-
-
-
SFR
SFR
SFR
SFR
150
P1L
PUD
EN.7
P1L
PHEN
.7
P1H
PUD
EN.7
P1H
PHEN
.7
rw
rw
rw
rw
7
7
7
7
P1L
PUD
EN.6
P1L
PHEN
.6
P1H
PUD
EN.6
P1H
PHEN
.6
rw
rw
rw
rw
6
6
6
6
P1L
PUD
EN.5
P1L
PHEN
.5
P1H
PUD
EN.5
P1H
PHEN
.5
rw
rw
rw
rw
5
5
5
5
P1L
PUD
EN.4
P1L
PHEN
.4
P1H
PUD
EN.4
P1H
PHEN
.4
rw
rw
rw
rw
4
4
4
4
P1L
PUD
EN.3
P1L
PHEN
.3
P1H
PUD
EN.3
P1H
PHEN
.3
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rw
rw
rw
Reset Value: - - 00
3
Reset Value: - - 00
3
Reset Value: - - 00
3
Reset Value: - - 00
3
P1L
PUD
EN.2
P1L
PHEN
.2
P1H
PUD
EN.2
P1H
PHEN
.2
rw
rw
rw
rw
2
2
2
2
Parallel Ports
P1L
PUD
EN.1
P1L
PHEN
.1
P1H
PUD
EN.1
P1H
PHEN
.1
rw
rw
rw
rw
2001-04-19
1
1
1
1
C161U
P1L
PUD
EN.0
P1L
PHEN
.0
P1H
PUD
EN.0
P1H
PHEN
.0
rw
rw
rw
rw
0
0
0
0
H
H
H
H

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