SAF-C161U-LF V1.3 Infineon Technologies, SAF-C161U-LF V1.3 Datasheet - Page 215

• Manufacturer Part Number: SAF-C161U-LF V1.3
• Description: IC MCU ISDN 16BIT TTL TQFP-100
• Manufacturer: Infineon Technologies
• Series: C16xxr

Specifications of SAF-C161U-LF V1.3

• Core Processor: C166
• Core Size: 16-Bit
• Speed: 36MHz
• Connectivity: EBI/EMI, SPI, UART/USART, USB
• Peripherals: POR, PWM, WDT
• Number Of I /o: 56
• Program Memory Type: ROMless
• Ram Size: 3K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-LFQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Other names: SAFC161ULFV1.3X; SAFC161ULFV13XP; SP000007502

GPT incorporate five 16-bit timers that are grouped into the two timer blocks GPT1 and
GPT2. Each timer in each block may operate independently in a number of different
modes such as gated timer or counter mode, or may be concatenated with another timer
of the same block.
Block 1 contains 3 timers/counters with a maximum resolution of f
timers of GPT1 may optionally be configured as reload or capture registers for the core
timer.
Block 2 contains 2 internal timers/counters with a maximum resolution of f
additional CAPREL register supports capture and reload operation with extended
functionality.
The following enumeration summarizes all features to be supported:
Timer Block 1:
f
3 independent timers/counters.
Timers/counters can be concatenated.
4 operating modes (timer, gated timer, counter, incremental).
Separate interrupt nodes.
Timer Block 2:
f
2 independent timers/counters.
Timers/counters can be concatenated.
2
Capture/reload functions via 16-bit Capture/Reload register CAPREL.
Separate interrupt nodes.
11.1
11.1.1
All three timers of block 1 (T2, T3, T4) can run in 4 basic modes, which are timer, gated
timer, counter and incremental interface mode, and all timers can either count up or
down.
The input line (TxIN) associated with it which serves as the gate control in gated timer
mode, or as the count input in counter mode. The count direction (Up / Down) may be
programmed via software or may be dynamically altered by a signal at an external
control input line. An overflow/underflow of core timer T3 is indicated by the output toggle
latch T3OTL whose state may be output on related line T3OUT.
Data Sheet
Timer
Timer
operating modes (timer, counter).
/4 maximum resolution.
/2 maximum resolution.
Kernel Description
Functional Description of Timer Block 1
215
General Purpose Timer Unit
Timer
/4. The auxiliary
Timer
2001-04-19
C161U
/2. An