SAF-C161U-LF V1.3 Infineon Technologies, SAF-C161U-LF V1.3 Datasheet - Page 287

no-image

SAF-C161U-LF V1.3

Manufacturer Part Number
SAF-C161U-LF V1.3
Description
IC MCU ISDN 16BIT TTL TQFP-100
Manufacturer
Infineon Technologies
Series
C16xxr
Datasheet

Specifications of SAF-C161U-LF V1.3

Core Processor
C166
Core Size
16-Bit
Speed
36MHz
Connectivity
EBI/EMI, SPI, UART/USART, USB
Peripherals
POR, PWM, WDT
Number Of I /o
56
Program Memory Type
ROMless
Ram Size
3K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
100-LFQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-
Other names
SAFC161ULFV1.3X
SAFC161ULFV13XP
SP000007502
Prior to an autobaud detection the prescaler part has to be setup by the CPU while the
baudrate timer (register BG) is initialized with a 13-bit value (BR_VALUE) automatically
after a successfull autobaud detection. For the following calculations, the fractional
divider is used (CON_FDE = 1).
Note: It is also possible to use the fixed divide-by-2 or divide-by-3 prescaler. But the
Standard Baudrates
For standard baudrate detection the baudrates as shown in Table 63 can be e.g.
detected. Therefore, the output frequency f
set to a frequency derived from the module clock f
MHz. The value to be written into register FDV is the nearest integer value which is
calculated according the following formula :
Table 63 defines the nine standard baudrates (Br0 - Br8) which can be detected for
f
Table 63
According Table 63 a baudrate of 9600 Baud is achieved when register BG is loaded
with a value of 047
Table 63 also lists a divide factor d
Data Sheet
DIV
Baudrate
Numbering
Br0
Br1
Br2
Br3
Br4
Br5
Br6
Br7
Br8
=11.0592 MHz.
fractional divider allows to adapt f
Autobaud Detection using Standard Baudrates (f
Detectable Standard
Baudrate
230.400 kBaud
115.200 kBaud
57.600 kBaud
38.400 kBaud
19.200 kBaud
9600 Baud
4800 Baud
2400 Baud
1200 Baud
H
, assuming that f
FDV =
Baudrate =
f
which is defined with the following formula :
DIV
512 x 11.0592 MHz
DIV
has been set to 11.0592 MHz.
287
much more precise to the required value.
f
DIV
Divide Factor d
48
96
192
288
576
1152
2304
4608
9216
MOD
Asynchronous/Synchr. Serial Interface
f
d
of the ASC baudrate generator must be
DIV
f
MOD
in a way that it is equal to 11.0592
f
BG is loaded after
detection with value
2
5
11
17
35
71
143 = 08F
287 = 11F
DIV
= 002
= 005
= 00B
= 011
= 023
= 047
= 11.0592 MHz)
575= 23F
H
H
H
H
H
H
H
H
2001-04-19
H
C161U

Related parts for SAF-C161U-LF V1.3