SAF-C161U-LF V1.3 Infineon Technologies, SAF-C161U-LF V1.3 Datasheet - Page 231

• Manufacturer Part Number: SAF-C161U-LF V1.3
• Description: IC MCU ISDN 16BIT TTL TQFP-100
• Manufacturer: Infineon Technologies
• Series: C16xxr

Specifications of SAF-C161U-LF V1.3

• Core Processor: C166
• Core Size: 16-Bit
• Speed: 36MHz
• Connectivity: EBI/EMI, SPI, UART/USART, USB
• Peripherals: POR, PWM, WDT
• Number Of I /o: 56
• Program Memory Type: ROMless
• Ram Size: 3K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-LFQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Other names: SAFC161ULFV1.3X; SAFC161ULFV13XP; SP000007502

Auxiliary Timer T4 in Capture Mode
Capture mode for the auxiliary timer T4 is selected by setting bit field T4M in the register
T4CON to ‘101
auxiliary timer register in response to a signal transition at the auxiliary timer's external
input line T4IN. The capture trigger signal can be a positive, a negative, or both a positive
and a negative transition.
The two least significant bits of bit field T4I are used to select the active transition (see
table in the counter mode section), while the most significant bit T4I.2 is irrelevant for
capture mode. It is recommended to keep this bit cleared (T4I.2 = ‘0’).
Note: When programmed for capture mode, the auxiliary timer T4 stops independent of
Figure 70
Upon a trigger (selected transition) at the input line T4IN the contents of the core timer
is loaded into the auxiliary timer register and the associated interrupt request flag T4IR
will be set.
Note: The direction control for T4IN must be set to 'Input', and the level of the capture
Data Sheet
Inpu t
C lo ck
x = 4
T xIN
its run flag T4R.
trigger signal should be held high or low for at least 4 f
before it changes to ensure correct edge detection.
E dge
S elect
Auxiliary Timer T4 of Timer Block 1 in Capture Mode
B
’. In capture mode the contents of the core timer are latched into the
T xI
C ap ture R egiste r T x
C ore T im e r T 3
U p/D ow n
231
T 3 O T L
General Purpose Timer Unit
Timer
T 3 O E
(FM1 = ’1’) cycles
Interrup t
R eq uest
Interrup t
R eq uest
T 3O U T
M C B 020 38
2001-04-19
C161U