SAF-C161U-LF V1.3 Infineon Technologies, SAF-C161U-LF V1.3 Datasheet - Page 401

• Manufacturer Part Number: SAF-C161U-LF V1.3
• Description: IC MCU ISDN 16BIT TTL TQFP-100
• Manufacturer: Infineon Technologies
• Series: C16xxr

Specifications of SAF-C161U-LF V1.3

• Core Processor: C166
• Core Size: 16-Bit
• Speed: 36MHz
• Connectivity: EBI/EMI, SPI, UART/USART, USB
• Peripherals: POR, PWM, WDT
• Number Of I /o: 56
• Program Memory Type: ROMless
• Ram Size: 3K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-LFQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Other names: SAFC161ULFV1.3X; SAFC161ULFV13XP; SP000007502

It is also possible to use the stack underflow and stack overflow traps to cache portions
of a larger external stack. Only the portion of the system stack currently being used is
placed into the internal memory, thus allowing a greater portion of the internal RAM to
be used for program, data or register banking. This approach assumes no error but
requires a set of control routines (see below).
Circular (virtual) Stack
This basic technique allows pushing until the overflow boundary of the internal stack is
reached. At this point a portion of the stacked data must be saved into external memory
to create space for further stack pushes. This is called “stack flushing”. When executing
a number of return or pop instructions, the upper boundary (since the stack empties
upward to higher memory locations) is reached. The entries that have been previously
saved in external memory must now be restored. This is called “stack filling”. Because
procedure call instructions do not continue to nest infinitely and call and return
instructions alternate, flushing and filling normally occurs very infrequently. If this is not
true for a given program environment, this technique should not be used because of the
overhead of flushing and filling.
The basic mechanism is the transformation of the addresses of a virtual stack area,
controlled via registers SP, STKOV and STKUN, to a defined physical stack area within
the internal RAM via hardware. This virtual stack area covers all possible locations that
SP can point to, ie. 00’F000
4 KByte address range.
The size of the physical stack area within the internal RAM that effectively is used for
standard stack operations is defined via bitfield STKSZ in register SYSCON (see below).
Data Sheet
<STKSZ> Stack
0 0 0
0 0 1
0 1 0
0 1 1
1 0 0
1 0 1
1 1 0
1 1 1
B
B
B
B
B
B
B
B
Size
(Words)
256
128
64
32
512
---
---
1024
Internal RAM Addresses (Words)
of Physical Stack
00’FBFE
00’FBFE
00’FBFE
00’FBFE
00’FBFE
Reserved. Do not use this combination.
Reserved. Do not use this combination.
00’FDFE
stack)
00’FX00
1 KB: 00’FA00
00’F200
H
through 00’FFFE
H
H
H
H
H
H
H
H
...00’FA00
...00’FB00
...00’FB80
...00’FBC0
...00’F800
represents the lower IRAM limit, ie.
...00’FX00
H
, 2 KB: 00’F600
401
H
H
H
H
H
H
(not for 1KByte IRAM) SP.9...SP.0
(Default after Reset)
(Note: No circular
H
. STKOV and STKUN accept the same
H
, 3 KB:
System Programming
Significant Bits
of Stack
Pointer SP
SP.8...SP.0
SP.7...SP.0
SP.6...SP.0
SP.5...SP.0
---
---
SP.11...SP.0
2001-04-19
C161U