SAF-C161U-LF V1.3 Infineon Technologies, SAF-C161U-LF V1.3 Datasheet - Page 208

• Manufacturer Part Number: SAF-C161U-LF V1.3
• Description: IC MCU ISDN 16BIT TTL TQFP-100
• Manufacturer: Infineon Technologies
• Series: C16xxr

Specifications of SAF-C161U-LF V1.3

• Core Processor: C166
• Core Size: 16-Bit
• Speed: 36MHz
• Connectivity: EBI/EMI, SPI, UART/USART, USB
• Peripherals: POR, PWM, WDT
• Number Of I /o: 56
• Program Memory Type: ROMless
• Ram Size: 3K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-LFQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Other names: SAFC161ULFV1.3X; SAFC161ULFV13XP; SP000007502

Data Sheet
10.6
In high performance systems it may be efficient to share external resources like memory
banks or peripheral devices among more than one controller. C161U supports this
approach with the possibility to arbitrate the access to its external bus, ie. to the external
devices.
This bus arbitration allows an external master to request the C161U’s bus via the HOLD
input. C161U acknowledges this request via the HLDA output and will float its bus lines
in this case. The CS outputs provide internal pullup devices. The new master may now
access the peripheral devices or memory banks via the same interface lines as the
C161U. During this time the C161U can keep on executing, as long as it does not need
access to the external bus. All actions that just require internal resources like instruction
or data memory and on-chip peripherals, may be executed in parallel.
When the C161U needs access to its external bus while it is occupied by another bus
master, it demands it via the BREQ output.
The external bus arbitration is enabled by setting bit HLDEN in register PSW to ‘1’. In
this case the three bus arbitration pins HOLD, HLDA and BREQ are automatically
controlled by the EBC independent of their I/O configuration. Bit HLDEN may be cleared
during the execution of program sequences, where the external resources are required
but cannot be shared with other bus masters. In this case the C161U will not answer to
HOLD requests from other external masters. If HLDEN is cleared while the C161U is in
Hold State (code execution from internal RAM) this Hold State is left only after HOLD has
been deactivated again. Ie. in this case the current Hold State continues and only the
next HOLD request is not answered.
Connecting eg. two C161Us in this way would require additional logic to combine the
respective output signals HLDA and BREQ. This can be avoided by switching one of the
controllers into Slave Mode where pin HLDA is switched to input. This allows to directly
connect the slave controller to another master controller without glue logic. The Slave
Mode is selected by setting bit DP6.7 to ’1’. DP6.7=’0’ (default after reset) selects the
Master Mode.
Note: The pins HOLD, HLDA and BREQ keep their alternate function (bus arbitration)
Connecting Bus Masters
When multiple C161Us or a C161U and another bus master shall share external
resources some glue logic is required that defines the currently active bus master and
also enables a C161U which has surrendered its bus interface to regain control of it in
case it must access the shared external resources. This glue logic is required if the
„other“ bus master does not automatically remove its hold request after having used the
shared resources.
even after the arbitration mechanism has been switched off by clearing HLDEN.
All three pins are used for bus arbitration after bit HLDEN was set once.
External Bus Arbitration
208
External Bus Interface
2001-04-19
C161U