SAF-C161U-LF V1.3 Infineon Technologies, SAF-C161U-LF V1.3 Datasheet - Page 340

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SAF-C161U-LF V1.3

Manufacturer Part Number
SAF-C161U-LF V1.3
Description
IC MCU ISDN 16BIT TTL TQFP-100
Manufacturer
Infineon Technologies
Series
C16xxr
Datasheet

Specifications of SAF-C161U-LF V1.3

Core Processor
C166
Core Size
16-Bit
Speed
36MHz
Connectivity
EBI/EMI, SPI, UART/USART, USB
Peripherals
POR, PWM, WDT
Number Of I /o
56
Program Memory Type
ROMless
Ram Size
3K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
100-LFQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-
Other names
SAFC161ULFV1.3X
SAFC161ULFV13XP
SP000007502
Data Sheet
USBD_STATUS_REG0
Table 76
The USBD status register 0 provides the SW with status indication for RX and TX FIFOs
and provides handshake control for both FIFOs. This register is read-only.
USBD_STATUS_REG1
Table 77
The USBD status register 1 provides the SW with internal handshake indication for RX
and TX FIFOs. This register is read/write (writing ’1’ resets the bit).
Note: RX_XFR_ACK are reflected in the corresponding RX_BYTECNT registers.
Bit No. Bit
15:8
7:0
Bit No. Bit
15:8
7:0
RX_EMPTY(7:0)
TX_FULL(7:0)
RX_XFR_ACK(7:0)
TX_XFR_ACK(7:0)
USBD_STATUS_REG0 Status Register
USBD_STATUS_REG1 Status Register
Reset Value: 0000
Reset Value: 0000
Function
1: Indicates RX Transfer Acknowledge for USBD
0: idle/busy
1: Indicates TX Transfer Acknowledge for USBD FIFO
0: idle/busy
Function
1: Indicates RX Fifo Endpoint N (N=7..0) is empty
0: not empty
The reset value is ’0’, but after reset the value changes
immediately.
1: Indicates TX Fifo Endpoint N (N=7..0) is full
0: normal operation
FIFO Endpoint N (N=7..0)
Endpoint N (N=7..0)
340
H
H
USB Interface Controller
2001-04-19
C161U

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