SAF-C161U-LF V1.3 Infineon Technologies, SAF-C161U-LF V1.3 Datasheet - Page 73

• Manufacturer Part Number: SAF-C161U-LF V1.3
• Description: IC MCU ISDN 16BIT TTL TQFP-100
• Manufacturer: Infineon Technologies
• Series: C16xxr

Specifications of SAF-C161U-LF V1.3

• Core Processor: C166
• Core Size: 16-Bit
• Speed: 36MHz
• Connectivity: EBI/EMI, SPI, UART/USART, USB
• Peripherals: POR, PWM, WDT
• Number Of I /o: 56
• Program Memory Type: ROMless
• Ram Size: 3K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-LFQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Other names: SAFC161ULFV1.3X; SAFC161ULFV13XP; SP000007502

CSP (FE08
Code memory addresses are generated by directly extending the 16-bit contents of the
IP register by the contents of the CSP register as shown in the figure below.
In case of the segmented memory mode the selected number of segment address bits
(via bitfield SALSEL) of register CSP is output on the respective segment address pins
of Port 4 for all external code accesses. For non-segmented memory mode or Single
Chip Mode the content of this register is not significant, because all code acccesses are
automatically restricted to segment 0.
Note: The CSP register can only be read but not written by data operations. It is,
Data Sheet
Bit
SEGNR
15
-
-
however, modified either directly by means of the JMPS and CALLS instructions,
or indirectly via the stack by means of the RETS and RETI instructions.
Upon the acceptance of an interrupt or the execution of a software TRAP
instruction, the CSP register is automatically set to zero.
14
-
-
H
/ 04
13
-
-
Segment Number
Function
Specifies the code segment, from where the current instruction is to be
fetched. SEGNR is ignored, when segmentation is disabled.
H
)
12
-
-
11
-
-
10
-
-
9
-
-
8
-
-
SFR
73
7
6
5
4
SEGNR
Central Processor Unit
r
Reset Value: 0000
3
2
2001-04-19
1
C161U
0
H