SAF-C161U-LF V1.3 Infineon Technologies, SAF-C161U-LF V1.3 Datasheet - Page 351

• Manufacturer Part Number: SAF-C161U-LF V1.3
• Description: IC MCU ISDN 16BIT TTL TQFP-100
• Manufacturer: Infineon Technologies
• Series: C16xxr

Specifications of SAF-C161U-LF V1.3

• Core Processor: C166
• Core Size: 16-Bit
• Speed: 36MHz
• Connectivity: EBI/EMI, SPI, UART/USART, USB
• Peripherals: POR, PWM, WDT
• Number Of I /o: 56
• Program Memory Type: ROMless
• Ram Size: 3K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-LFQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Other names: SAFC161ULFV1.3X; SAFC161ULFV13XP; SP000007502

16
To allow recovery from software or hardware failure, the C161U provides a Watchdog
Timer. If the software fails to service this timer before an overflow occurs, an internal
reset sequence will be initiated. This internal reset will also pull the RSTOUT pin low,
which also resets the peripheral hardware, which might be the cause for the malfunction.
When the watchdog timer is enabled and the software has been designed to service it
regularly before it overflows, the watchdog timer will supervise the program execution,
as it only will overflow if the program does not progress properly. The watchdog timer will
also time out, if a software error was due to hardware related failures. This prevents the
controller from malfunctioning for longer than a user-specified time.
The watchdog timer provides two registers: a read-only timer register that contains the
current count, and a control register for initialization.
Figure 109
The watchdog timer is a 16-bit up counter which can be clocked with the CPU clock (f
either divided by 2 or divided by 128. This 16-bit timer is realized as two concatenated
8-bit timers (see figure below). The upper 8 bits of the watchdog timer can be preset to
a user-programmable value via a watchdog service access in order to vary the watchdog
expire time. The lower 8 bits are reset on each service access.
Figure 110
Data Sheet
f
CPU
Reset Indication Pin
÷ 128
Watchdog Timer (WDT)
RSTOUT
÷ 2
SFRs and Port Pins associated with the Watchdog Timer
Watchdog Timer Block Diagram
WDTIN
MUX
WDT
Data Registers
WDT Low Byte
Control
WDT
Clear
351
Control Registers
WDTCON
WDT High Byte
WDTREL
Watchdog Timer (WDT)
Reset
WDTR
2001-04-19
RSTOUT
MCB02052
C161U
CPU
)