SAF-C161U-LF V1.3 Infineon Technologies, SAF-C161U-LF V1.3 Datasheet - Page 260

• Manufacturer Part Number: SAF-C161U-LF V1.3
• Description: IC MCU ISDN 16BIT TTL TQFP-100
• Manufacturer: Infineon Technologies
• Series: C16xxr

Specifications of SAF-C161U-LF V1.3

• Core Processor: C166
• Core Size: 16-Bit
• Speed: 36MHz
• Connectivity: EBI/EMI, SPI, UART/USART, USB
• Peripherals: POR, PWM, WDT
• Number Of I /o: 56
• Program Memory Type: ROMless
• Ram Size: 3K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-LFQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Other names: SAFC161ULFV1.3X; SAFC161ULFV13XP; SP000007502

Data Sheet
Field
PE
FE
OE
FDE
ODD
BRS
LB
R
Bits
8
9
10
11
12
13
14
15
Type Value
rwh
rwh
rwh
rw
rwh
rw
rw
rw
0
1
0
1
0
1
0
1
0
1
Description
Parity Error Flag
Set by hardware on a parity error (PEN=’1’).
Must be reset by software.
Framing Error Flag
Set by hardware on a framing error (FEN=’1’).
Must be reset by software.
Overrun Error Flag
Set by hardware on an overrun error (OEN=’1’).
Must be reset by software.
Fractional Divider Enable
Fractional divider disabled
Fractional divider is enabled and used as
prescaler for baudrate timer (bit BRS is don’t
care)
Parity Selection
Even parity selected (parity bit set on odd
number of ‘1’s in data)
Odd parity selected (parity bit set on even
number of ‘1’s in data)
Bit is be set/cleared by hardware after a
successfull autobaud detection operation.
Baudrate Selection
Baudrate timer prescaler divide-by-2 selected
Baudrate timer prescaler divide-by-3 selected
BRS is don’t care if FDE=1 (fractional divider
enabled)
Loopback Mode Enable
Loopback mode disabled
Loopback mode enabled
Baudrate Generator Run Control
Baudrate generator disabled (ASC_P inactive)
Baudrate generator enabled
BG should only be written if R=’0’.
260
Asynchronous/Synchr. Serial Interface
2001-04-19
C161U