SAF-C161U-LF V1.3 Infineon Technologies, SAF-C161U-LF V1.3 Datasheet - Page 276

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SAF-C161U-LF V1.3

Manufacturer Part Number
SAF-C161U-LF V1.3
Description
IC MCU ISDN 16BIT TTL TQFP-100
Manufacturer
Infineon Technologies
Series
C16xxr
Datasheet

Specifications of SAF-C161U-LF V1.3

Core Processor
C166
Core Size
16-Bit
Speed
36MHz
Connectivity
EBI/EMI, SPI, UART/USART, USB
Peripherals
POR, PWM, WDT
Number Of I /o
56
Program Memory Type
ROMless
Ram Size
3K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
100-LFQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-
Other names
SAFC161ULFV1.3X
SAFC161ULFV13XP
SP000007502
Data Sheet
12.1.6
Synchronous mode supports half-duplex communication, basically for simple I/O
expansion via shift registers. Data is transmitted and received via pin RXD while pin TXD
outputs the shift clock. These signals are alternate functions of port pins P3.11 and
P3.10. Synchronous mode is selected with CON_M=’000
Eight data bits are transmitted or received synchronous to a shift clock generated by the
internal baudrate generator. The shift clock is only active as long as data bits are
transmitted or received.
Note: The lines RXDI and RXDO are concatenated in the port logic to pin RXD.
Figure 84
Note: RXDI and RXDO are
TXD
concatenated in the
port logic to pin RXD.
RXDO
RXDI
Synchronous Operation
f
MOD
Synchronous Mode of Serial Channel ASC_P
0
MUX
1
R
REN
OEN
LB
Receive Buffer Reg.
Receive Shift
÷2
÷3
Register
RBUF
M=000
Shift Clock
BRS
Mux
Serial Port Control
B
Shift Clock
Internal Bus
276
f
DIV
Asynchronous/Synchr. Serial Interface
13-Bit Reload Register
13-Bit Baudrate Timer
Transmit Buffer Reg.
OE
Transmit Shift
Register
TBUF
B
RIR
TIR
TBIR
EIR
’.
f
BRT
Receive Int.
Request
Transmit Int.
Request
Transmit Buffer
Int. Request
Error Int.
Request
÷4
f
BR
2001-04-19
C161U

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