SAF-C161U-LF V1.3 Infineon Technologies, SAF-C161U-LF V1.3 Datasheet - Page 426

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SAF-C161U-LF V1.3

Manufacturer Part Number
SAF-C161U-LF V1.3
Description
IC MCU ISDN 16BIT TTL TQFP-100
Manufacturer
Infineon Technologies
Series
C16xxr
Datasheet

Specifications of SAF-C161U-LF V1.3

Core Processor
C166
Core Size
16-Bit
Speed
36MHz
Connectivity
EBI/EMI, SPI, UART/USART, USB
Peripherals
POR, PWM, WDT
Number Of I /o
56
Program Memory Type
ROMless
Ram Size
3K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
100-LFQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-
Other names
SAFC161ULFV1.3X
SAFC161ULFV13XP
SP000007502
Data Sheet
22.4
The following table lists all SFRs which are implemented in the C161U ordered by their
name. Bit-addressable SFRs are marked with the letter “b” in column “Type”.
SFRs within the Extended SFR-Space (ESFRs) are marked with the letter “E” in column
“Type”.
Table 93
Register
Name
ABENDIC
ABS0CON
ABSTAT
ABSTIC
ADDRSEL1
ADDRSEL2
ADDRSEL3
ADDRSEL4
BUSCON0
BUSCON1
BUSCON2
BUSCON3
BUSCON4
CAPREL
CLISNC
CP
CRIC
CSP
DP0H
DP0L
DP1H
Special Function Registers ordered by Name
Registers ordered by Name
Physi.
Addr
F18C
FEF8
FEFE
F194
FE18
FE1A
FE1C
FE1E
FF0C
FF14
FF16
FF18
FF1A
FE4A
FFA8
FE10
FF6A
FE08
F102
F100
F106
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
Type
ESFR-b C6
SFR
SFR
ESFR-b CA
SFR
SFR
SFR
SFR
SFR-b
SFR-b
SFR-b
SFR-b
SFR-b
SFR
SFR-b
SFR
SFR-b
SFR
ESFR-b 81
ESFR-b 80
ESFR-b 83
8-bit
Addr
7C
7F
0C
0D
0E
0F
86
8A
8B
8C
8D
25
D4
08
B5
04
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
Description
ASC Autobaud End Interrupt Control
Register
ASC Autobaud Control Register
ASC Autobaud Status Register
ASC Autobaud Start Interrupt Control
Register
Address Select Register 1
Address Select Register 2
Address Select Register 3
Address Select Register 4
Bus Configuration Register 0
Bus Configuration Register 1
Bus Configuration Register 2
Bus Configuration Register 3
Bus Configuration Register 4
GPT1/2 Capture / Reload Register
The channel link interrupt subnode
register
CPU Context Pointer Register
GPT2 CAPREL Interrupt Control
Register
CPU Code Segment Pointer Register
(8 bits)
P0H Direction Control Register
P0L Direction Control Register
P1H Direction Control Register
426
Register Set
2001-04-19
C161U
Reset
Value
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
FC00
0000
0000
00
00
00
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H

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