SAF-C161U-LF V1.3 Infineon Technologies, SAF-C161U-LF V1.3 Datasheet - Page 86

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SAF-C161U-LF V1.3

Manufacturer Part Number
SAF-C161U-LF V1.3
Description
IC MCU ISDN 16BIT TTL TQFP-100
Manufacturer
Infineon Technologies
Series
C16xxr
Datasheet

Specifications of SAF-C161U-LF V1.3

Core Processor
C166
Core Size
16-Bit
Speed
36MHz
Connectivity
EBI/EMI, SPI, UART/USART, USB
Peripherals
POR, PWM, WDT
Number Of I /o
56
Program Memory Type
ROMless
Ram Size
3K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
100-LFQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-
Other names
SAFC161ULFV1.3X
SAFC161ULFV13XP
SP000007502
Data Sheet
24-bit Extension of Source and Destination Pointers
The source and destination pointers specify the locations between which the data is to
be moved. For each of the eight PEC channels the source and destination pointers are
specified by one SFR register and two IRAM memory locations. One SFR register stores
the 8-bit segment number of the source (PECSSN) and the 8-bit segment number of the
destination (PECDSN) location in a respective 16-bit PEC Segment Number register
(PECSNx). The respective segment offset of source and destination are stored in IRAM
memory location identical to the IRAM locations of SRCPx and DSTPx pointers of Full-
Custom C16x standard PEC channels - thus the extension is fully compatible. With the
segment number extension of source and destination, data can be transferred by a PEC
transfer between any two locations within the 2 MByte address space of the C161U.
Note: The segment number extension of source and destination is provided for all 8 PEC
The PEC segment number registers PECSNx are defined as follows:
PECSNx (Addresses see table)
Bit
PECSSN
PECDSN
15
channels. After reset, all 8 segment number registers PECSNx are cleared,
providing full compatibility to FC-C16x PEC channels.
14
13
Function
PEC Source Segment Number
8-bit Segment Number used for addressing the source of the respective
PEC transfer.
Bits 4:0 can be used externally (address bits A20:A16). Due to the limited
number of pins, the upper bits 7:5 can not be used externally but can still
be used for chip select (CS) generation.
PEC Destination Segment Number
8-bit Segment Number used for addressing the destination of the
respective PEC transfer.
Bits 12:8 can be used externally (address bits A20:A16). Due to the
limited number of pins, the upper bits 15:13 can not be used externally
but can still be used for chip select (CS) generation.
PECDSN
12
rw
11
10
9
8
SFR
86
7
6
5
PECSSN
4
Central Processor Unit
rw
Reset Value: 0000
3
2
2001-04-19
1
C161U
0
H

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