SAF-C161U-LF V1.3 Infineon Technologies, SAF-C161U-LF V1.3 Datasheet - Page 187

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SAF-C161U-LF V1.3

Manufacturer Part Number
SAF-C161U-LF V1.3
Description
IC MCU ISDN 16BIT TTL TQFP-100
Manufacturer
Infineon Technologies
Series
C16xxr
Datasheet

Specifications of SAF-C161U-LF V1.3

Core Processor
C166
Core Size
16-Bit
Speed
36MHz
Connectivity
EBI/EMI, SPI, UART/USART, USB
Peripherals
POR, PWM, WDT
Number Of I /o
56
Program Memory Type
ROMless
Ram Size
3K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
100-LFQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-
Other names
SAFC161ULFV1.3X
SAFC161ULFV13XP
SP000007502
10.2
Important timing characteristics of the external bus interface have been made user
programmable to allow to adapt it to a wide range of different external bus and memory
configurations with different types of memories and/or peripherals.
The following parameters of an external bus cycle are programmable:
• LE Control defines the ALE signal length and the address hold time after its falling
• Memory Cycle Time (extendable with 1...15 waitstates) defines the allowable access
• Memory Tri-State Time (extendable with 1 waitstate) defines the time for a data driver
• Read/Write Delay Time defines when a command is activated after the falling edge of
• READY Control defines, if a bus cycle is terminated internally or externally
Note: Internal accesses are executed with maximum speed and therefore are not
Data Sheet
edge
time
to float
ALE
programmable.
External acceses use the slowest possible bus cycle after reset. The bus cycle
timing may then be optimized by the initialization software.
Programmable Bus Characteristics
187
External Bus Interface
2001-04-19
C161U

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