SAF-C161U-LF V1.3 Infineon Technologies, SAF-C161U-LF V1.3 Datasheet - Page 190

• Manufacturer Part Number: SAF-C161U-LF V1.3
• Description: IC MCU ISDN 16BIT TTL TQFP-100
• Manufacturer: Infineon Technologies
• Series: C16xxr

Specifications of SAF-C161U-LF V1.3

• Core Processor: C166
• Core Size: 16-Bit
• Speed: 36MHz
• Connectivity: EBI/EMI, SPI, UART/USART, USB
• Peripherals: POR, PWM, WDT
• Number Of I /o: 56
• Program Memory Type: ROMless
• Ram Size: 3K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-LFQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Other names: SAFC161ULFV1.3X; SAFC161ULFV13XP; SP000007502

C161U
External Bus Interface
Bus Cycle
Segment
Address
ALE
BUS (P0)
Data/Instr.
Address
RD
BUS (P0)
Address
Data
WR
MCTC Wait States (1...15)
MCT02063
Figure 49
Memory Cycle Time
The external bus cycles of the C161U can be extended for a memory or peripheral, which
cannot keep pace with the controller’s maximum speed, by introducing wait states during
the access (see figure above). During these memory cycle time wait states, the CPU is
idle, if this access is required for the execution of the current instruction.
The memory cycle time wait states can be programmed in increments of one CPU clock
within a range from 0 to 15 (default after reset) via the MCTC fields of the BUSCON
registers. 15-<MCTC> waitstates will be inserted.
Programmable Memory Tri-State Time
C161U allows the user to adjust the time between two subsequent external accesses to
account for the tri-state time of the external device. The tri-state time defines, when the
external device has released the bus after deactivation of the read command (RD).
Data Sheet
190
2001-04-19