SAF-C161U-LF V1.3 Infineon Technologies, SAF-C161U-LF V1.3 Datasheet - Page 116

• Manufacturer Part Number: SAF-C161U-LF V1.3
• Description: IC MCU ISDN 16BIT TTL TQFP-100
• Manufacturer: Infineon Technologies
• Series: C16xxr

Specifications of SAF-C161U-LF V1.3

• Core Processor: C166
• Core Size: 16-Bit
• Speed: 36MHz
• Connectivity: EBI/EMI, SPI, UART/USART, USB
• Peripherals: POR, PWM, WDT
• Number Of I /o: 56
• Program Memory Type: ROMless
• Ram Size: 3K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-LFQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Other names: SAFC161ULFV1.3X; SAFC161ULFV13XP; SP000007502

Data Sheet
action. COUNT may allow a specified number of PEC transfers, unlimited transfers or no
PEC service at all.
The table below summarizes, how the COUNT field itself, the interrupt requests flag IR
and the PEC channel action depends on the previous content of COUNT.
The PEC transfer counter allows to service a specified number of requests by the
respective PEC channel, and then (when COUNT reaches 00
service routine, which is associated with the priority level. After each PEC transfer the
COUNT field is decremented and the request flag is cleared to indicate that the request
has been serviced.
Continuous transfers are selected by the value FF
COUNT is not modified and the respective PEC channel services any request until it is
disabled again.
When COUNT is decremented from 01
cleared, which generates another request from the same source. When COUNT already
contains the value 00
interrupt service routine is activated instead. This allows to choose, if a level 15 or 14
request is to be serviced by the PEC or by the interrupt service routine.
Note: PEC transfers are only executed, if their priority level is higher than the CPU level,
Previous
COUNT
FF
FE
01
00
H
H
H
H
..02
ie. only PEC channels 7...4 are processed, while the CPU executes on level 14.
All interrupt request sources that are enabled and programmed for PEC service
should use different channels. Otherwise only one transfer will be performed for
all simultaneous requests. When COUNT is decremented to 00
to be interrupted, an incorrect interrupt vector will be generated.
H
Modified
COUNT
FF
FD
00
00
H
H
H
H
..01
H
H
, the respective PEC channel remains idle and the associated
IR after
PEC
service
‘0’
‘0’
‘1’
(‘1’)
Action of PEC Channel
and Comments
Move a Byte / Word. Continuous transfer mode, ie.
COUNT is not modified
Move a Byte / Word and decrement COUNT
Move a Byte / Word. Leave request flag set, which
triggers another request
No action! Activate interrupt service routine rather
than PEC channel.
H
to 00
116
H
after a transfer, the request flag is not
H
in bit field COUNT. In this case
Interrupt and Trap Functions
H
) activate the interrupt
H
, and the CPU is
2001-04-19
C161U