SAF-C161U-LF V1.3 Infineon Technologies, SAF-C161U-LF V1.3 Datasheet - Page 278

• Manufacturer Part Number: SAF-C161U-LF V1.3
• Description: IC MCU ISDN 16BIT TTL TQFP-100
• Manufacturer: Infineon Technologies
• Series: C16xxr

Specifications of SAF-C161U-LF V1.3

• Core Processor: C166
• Core Size: 16-Bit
• Speed: 36MHz
• Connectivity: EBI/EMI, SPI, UART/USART, USB
• Peripherals: POR, PWM, WDT
• Number Of I /o: 56
• Program Memory Type: ROMless
• Ram Size: 3K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-LFQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Other names: SAFC161ULFV1.3X; SAFC161ULFV13XP; SP000007502

Data Sheet
12.1.6.3 Synchronous Timing
Figure 85 shows timing diagrams of the ASC synchronous mode data reception and
data transmission. In idle state the shift clock is at high level. With the beginning of a
synchronous transmission of a data byte the data is shifted out at RXD with the falling
edge of the shift clock. If a data byte is received through RXD data is latched with the
rising edge of the shift clock.
Between two consecutive receive or transmit data bytes one shift clock cycle (f
is inserted.
Figure 85
12.1.7
The serial channel ASC has its own dedicated 13-bit baudrate generator with 13-bit
reload capability, allowing baudrate generation independent of the GPT timers.
Transmit Data
Continuous Transmit Timing
Receive Data
Receive/Transmit Timing
Shift Clock
Baudrate Generation
ASC_P3 Synchronous Mode Waveforms
Transmit Data
Receive Data
D0
D0
Shift Clock
D1
D1
D2
D2
D3
D3
1. Byte
278
1. Byte
Data n
Valid
Data
Bit n
D4
Asynchronous/Synchr. Serial Interface
D4
Shift
D5
D5
Data n+1
Latch
Bit n+1
Data
Valid
D6
D6
Shift
D7
D7
Data n+2
Latch
Bit n+2
Data
Valid
Shift
D0
D0
D1
D1
2. Byte
D2
2. Byte
2001-04-19
D2
BR
C161U
) delay
D3
D3