SAF-C161U-LF V1.3 Infineon Technologies, SAF-C161U-LF V1.3 Datasheet - Page 348

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SAF-C161U-LF V1.3

Manufacturer Part Number
SAF-C161U-LF V1.3
Description
IC MCU ISDN 16BIT TTL TQFP-100
Manufacturer
Infineon Technologies
Series
C16xxr
Datasheet

Specifications of SAF-C161U-LF V1.3

Core Processor
C166
Core Size
16-Bit
Speed
36MHz
Connectivity
EBI/EMI, SPI, UART/USART, USB
Peripherals
POR, PWM, WDT
Number Of I /o
56
Program Memory Type
ROMless
Ram Size
3K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
100-LFQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-
Other names
SAFC161ULFV1.3X
SAFC161ULFV13XP
SP000007502
Data Sheet
udc_setup-interrupt is generated and SW must read all four setup-registers. By reading
the last one (setup 61, an overwrite-protection for those registers will be released and
the device will accept the next setup-packet. As long as this register is not read, each
setup-packet on the USB will be NAK’d.
15.7.5
The endpoint zero has an additional feature in transmit-direction in order to handle an
early end of a setup-transaction. If, as an example, host requests for a device-desciptor
(by sending a get_descriptor(device_descriptor)) with a length of 12 bytes and the
maxpacketlength of endpoint zeo is eight, host must request for two control_in-packets
and then accnwowledge them with an status_out-packet. According to the USB-spec,
host can also request only one packet or even none before it sends out the status-
packet. This is called an early end of the setup-transaction.
If SW has already set up the data in the tx-fifo after the get_descriptor-command and
host will immediately after this request for different data with another setup-packet, the
old data, already in the fifo would be sent. By enabling the AutoFlushEnable-feature, with
every setup-packet which is visible for the CPU will flush the tx-fifo for endpoint zero. This
will avoid wrong, old data to be sent over control-enpoint zero.
This flush-mechanism could also be done by flushing the usb with a write into the
command-register of the USB-block but the flush initiated by SW might happen too late.
Note: The AutoFlushEnable-feature described above is only available if the C161U CPU
15.7.6
Each time the host send a valid set_configuration- or set_interface-command, this will
show up for the CPU as a configval-interrupt. In order to determine the actual
confitguration and the alternate setting of an interface, SW must read the configval-
register and set up the endpoints which are actually enabled.
There is no overwirte-protection on this register, the value is always updated if a valid
set_configuration or set_interface-packet is received.
15.7.7
All transmit-endpoints can be stalled by writing into the command-register, where it
makes no sense to stall an isochronous endpoint (for a isochronous packet there is no
stall-handshake, so the host will never notice that the endpoint is stalled and thus will
never try to abolish the stall-condition). The stall will be kept as long the bit in the
command-register is set and the host did not send a clear_feature-command.
is running with 36 MHz. This feature can not be used if the device is running with
24 MHz. In this case, pending data has to be flushed explicitly by Software via
register USBD_CMD_REG on reception of the OUT packet that ends setup
transfer, indicated by the rx_done interrupt of endpoint 0.
Special case: Setup-Transfer
Setting of configuration and alternate settings of interfaces
Stalling Endpoints
348
USB Interface Controller
2001-04-19
C161U

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