MK30DN512ZVLK10 Freescale Semiconductor, MK30DN512ZVLK10 Datasheet - Page 1016

• Manufacturer Part Number: MK30DN512ZVLK10
• Description: ARM Microcontrollers - MCU KINETIS 512K SLCD
• Manufacturer: Freescale Semiconductor

Specifications of MK30DN512ZVLK10

• Core: ARM Cortex M4
• Processor Series: K30
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 50 MHz
• Program Memory Size: 512 KB
• Data Ram Size: 128 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 1.71 V to 3.6 V
• Operating Temperature Range: - 40 C to + 105 C
• Package / Case: LQFP-80
• Mounting Style: SMD/SMT

Memory Map/Register Definition
1016
WRMFRZ
Reserved
Reserved
30–29
27–24
RFFN
Field
31
28
This field is reserved.
This read-only field is reserved and always has the value zero.
Write-Access to Memory in Freeze mode
Enable unrestricted write access to FlexCAN memory in Freeze mode. This bit can only be written in
Freeze mode and has no effect out of Freeze mode.
0
1
Number of Rx FIFO Filters
This 4-bit field defines the number of Rx FIFO filters, as shown in the following table. The maximum
selectable number of filters is determined by the MCU. This field can only be written in Freeze mode as it
is blocked by hardware in other modes. This field must not be programmed with values that make the
number of Message Buffers occupied by Rx FIFO and ID Filter exceed the number of Mailboxes present,
defined by MCR[MAXMB].
NOTE: Each group of eight filters occupies a memory space equivalent to two Message Buffers which
0x0
0x1
0x2
0x3
0x4
0x5
0x6
0x7
0x8
RFFN[3:
Maintain the write access restrictions.
Enable unrestricted write access to FlexCAN memory.
0]
means that the more filters are implemented the less Mailboxes will be available.
Considering that the Rx FIFO occupies the memory space originally reserved for MB0-5, RFFN
should be programmed with a value correponding to a number of filters not greater than the
number of available memory words which can be calculated as follows:
(SETUP_MB - 6) x 4
where SETUP_MB is the least between NUMBER_OF_MB and MAXMB.
The number of remaining Mailboxes available will be:
(SETUP_MB - 8) - (RFFN x 2)
If the Number of Rx FIFO Filters programmed through RFFN exceeds the SETUP_MB value
(memory space available) the exceeding ones will not be functional.
8
16
24
32
40
48
56
64
72
K30 Sub-Family Reference Manual, Rev. 6, Nov 2011
Number
filters
of Rx
FIFO
CANx_CTRL2 field descriptions
MB 0-7
MB 0-9
MB 0-11
MB 0-13
MB 0-15
MB 0-17
MB 0-19
MB 0-21
MB 0-23
occupied by Rx
Table continues on the next page...
FIFO and ID
Filter Table
Message
Buffers
MB 8-63
MB 10-63
MB 12-63
MB 14-63
MB 16-63
MB 18-63
MB 20-63
MB 22-63
MB 24-63
Mailboxes
Remaining
Description
Available
1
Elements 0-7
Elements 0-9
Elements 0-11
Elements 0-13
Elements 0-15
Elements 0-17
Elements 0-19
Elements 0-21
Elements 0-23
Individual Masks
Rx FIFO ID Filter
Table Elements
Affected by Rx
Freescale Semiconductor, Inc.
2
none
Elements 10-15
Elements 12-23
Elements 14-31
Elements 16-39
Elements 18-47
Elements 20-55
Elements 22-63
Elements 24-71
FIFO Global Mask
Rx FIFO ID Filter
Table Elements
Affected by Rx
2