MK30DN512ZVLK10 Freescale Semiconductor, MK30DN512ZVLK10 Datasheet - Page 471

• Manufacturer Part Number: MK30DN512ZVLK10
• Description: ARM Microcontrollers - MCU KINETIS 512K SLCD
• Manufacturer: Freescale Semiconductor

Specifications of MK30DN512ZVLK10

• Core: ARM Cortex M4
• Processor Series: K30
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 50 MHz
• Program Memory Size: 512 KB
• Data Ram Size: 128 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 1.71 V to 3.6 V
• Operating Temperature Range: - 40 C to + 105 C
• Package / Case: LQFP-80
• Mounting Style: SMD/SMT

21.5.5 Monitoring transfer descriptor status
21.5.5.1 Testing for minor loop completion
There are two methods to test for minor loop completion when using software initiated
service requests. The first is to read the TCDn_CITER field and test for a change.
Another method may be extracted from the sequence shown below. The second method is
to test the TCDn_CSR[START] bit and the TCDn_CSR[ACTIVE] bit. The minor-loop-
complete condition is indicated by both bits reading zero after the TCDn_CSR[START]
was set. Polling the TCDn_CSR[ACTIVE] bit may be inconclusive, because the active
status may be missed if the channel execution is short in duration.
The TCD status bits execute the following sequence for a software activated channel:
The best method to test for minor-loop completion when using hardware, that is,
peripheral, initiated service requests is to read the TCDn_CITER field and test for a
change. The hardware request and acknowledge handshake signals are not visible in the
programmer's model.
The TCD status bits execute the following sequence for a hardware-activated channel:
Freescale Semiconductor, Inc.
Stage
Transfer Number
3a
3b
1
2
2
3
4
5
6
START
1
0
0
0
K30 Sub-Family Reference Manual, Rev. 6, Nov 2011
TCDn_CSR bits
Table 21-298. Modulo example (continued)
ACTIVE
0
1
0
0
DONE
0
0
0
1
0x1234567C
0x12345674
0x12345678
0x12345670
0x12345674
Chapter 21 Direct Memory Access Controller (eDMA)
Channel service request via software
Channel is executing
Channel has completed the minor loop and is idle
Channel has completed the major loop and is idle
State
Address
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