MK30DN512ZVLK10 Freescale Semiconductor, MK30DN512ZVLK10 Datasheet - Page 642

• Manufacturer Part Number: MK30DN512ZVLK10
• Description: ARM Microcontrollers - MCU KINETIS 512K SLCD
• Manufacturer: Freescale Semiconductor

Specifications of MK30DN512ZVLK10

• Core: ARM Cortex M4
• Processor Series: K30
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 50 MHz
• Program Memory Size: 512 KB
• Data Ram Size: 128 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 1.71 V to 3.6 V
• Operating Temperature Range: - 40 C to + 105 C
• Package / Case: LQFP-80
• Mounting Style: SMD/SMT

Command Definition
1. Reset value reflects the status of flash security out of reset.
2. Reset value reflects if bulk erase is enabled or disabled out of reset
3. Initial value of WIP is 1, but the value clears to 0 after EzPort initialization is complete
642
0
WIP
1
WEN
2
BEDIS
6
WEF
7
FS
Reset:
W
R
Field
Write in progress.
Status flag that sets after a write command (SP, SE, BE, WRFCCOB) is accepted and clears once the
flash memory has completed all operations associated with that command as indicated by the Command
Complete Interrupt Flag (CCIF) inside the Flash. Also asserted on reset and clears when EzPort
initialization is complete. Only the Read Status Register (RDSR) command is accepted while a write is in
progress.
0 = Write is not in progress. Accept any command.
1 = Write is in progress. Only accept RDSR command.
Write enable
Control bit that must be set before a write command (SP, SE, BE, WRFCCOB) is accepted. Is set by the
Write Enable (WREN) command and cleared by reset or a Write Disable (WRDI) command. It also clears
when the flash memory has completed all operations associated with the command.
0 = Disables the following write command.
1 = Enables the following write command.
Bulk erase disable
Status flag which indicates if bulk erase (BE) is disabled when Flash is secure.
0 = Bulk Erase is enabled.
1 = Bulk Erase is disabled if the FS bit is also set. Attempts to issue a BE command will result in the WEF
flag being set.
Write error flag
Status flag that indicates if there has been an error while executing a write command (SP, SE, BE,
WRFCCOB). The WEF flag will set if either the Flash Access Error Flag (ACCERR) or the Flash Protection
Violation Flag (FPVIOL) or the Memory Controller Command Completion Status Flag (MGSTAT0) inside
the flash memory is set at the completion of the write command. See the flash memory chapter for further
description of these flags and their sources. The WEF flag clears after a Read Status Register (RDSR)
command.
0 = No error on previous write command.
1 = Error on previous write command.
Flash security
Status flag that indicates if the flash is secure. See
accepted when flash is secure. Flash security can be disabled by performing a Bulk Erase (BE) command.
0 = Flash is not secure
1 = Flash is secure.
0/1
FS
7
1
Table 29-4. EzPort Status Register Field Descriptions
K30 Sub-Family Reference Manual, Rev. 6, Nov 2011
WEF
6
0
Table 29-3. EzPort Status Register
5
0
4
0
Description
Table 29-2
3
0
for the list of commands which will be
BEDIS
0/1
2
2
Freescale Semiconductor, Inc.
WEN
1
0
WIP
1
0
3