MK30DN512ZVLK10 Freescale Semiconductor, MK30DN512ZVLK10 Datasheet - Page 487
MK30DN512ZVLK10
Manufacturer Part Number
MK30DN512ZVLK10
Description
ARM Microcontrollers - MCU KINETIS 512K SLCD
Manufacturer
Freescale Semiconductor
Datasheet
1.MK30DN512ZVLK10.pdf
(1547 pages)
Specifications of MK30DN512ZVLK10
Core
ARM Cortex M4
Processor Series
K30
Data Bus Width
32 bit
Maximum Clock Frequency
50 MHz
Program Memory Size
512 KB
Data Ram Size
128 KB
On-chip Adc
Yes
Operating Supply Voltage
1.71 V to 3.6 V
Operating Temperature Range
- 40 C to + 105 C
Package / Case
LQFP-80
Mounting Style
SMD/SMT
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Chapter 23
Watchdog Timer (WDOG)
23.1 Introduction
The Watchdog Timer (WDOG) keeps a watch on the system functioning and resets it in
case of its failure. Some reasons for such failures are: run-away software code and the
stoppage of the system clock that in a safety critical system can lead to serious
consequences. In such cases, the watchdog brings the system into a safe state of
operation. The watchdog monitors the operation of the system by expecting periodic
communication from the software, generally known as servicing or refreshing the
watchdog. If this periodic refreshing does not occur, the watchdog resets the system.
23.2 Features
The features of the Watchdog Timer (WDOG) include:
Freescale Semiconductor, Inc.
• Independent clock source input (independent from CPU/bus clock). Choice between
• Unlock sequence for allowing updates to write-once WDOG control/configuration
• All WDOG control/configuration bits are writable once only within 256 bus clock
two clock sources:
bits.
cycles of being unlocked.
• LPO Oscillator
• External system clock
For the chip-specific implementation details of this module's
instances see the chip configuration chapter.
K30 Sub-Family Reference Manual, Rev. 6, Nov 2011
NOTE
487
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