MK30DN512ZVLK10 Freescale Semiconductor, MK30DN512ZVLK10 Datasheet - Page 196

• Manufacturer Part Number: MK30DN512ZVLK10
• Description: ARM Microcontrollers - MCU KINETIS 512K SLCD
• Manufacturer: Freescale Semiconductor

Specifications of MK30DN512ZVLK10

• Core: ARM Cortex M4
• Processor Series: K30
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 50 MHz
• Program Memory Size: 512 KB
• Data Ram Size: 128 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 1.71 V to 3.6 V
• Operating Temperature Range: - 40 C to + 105 C
• Package / Case: LQFP-80
• Mounting Style: SMD/SMT

JTAG status and control registers
9.4.1 IR Codes
1. The manufacturer reserves the right to change the decoding of reserved instruction codes in the future
9.5 JTAG status and control registers
Through the ARM Debug Access Port (DAP), the debugger has access to the status and
control elements, implemented as registers on the DAP bus as shown in the following
figure. These registers provide additional control and status for low power mode recovery
and typical run-control scenarios. The status register bits also provide a means for the
debugger to get updated status of the core without having to initiate a bus transaction
across the crossbar switch, thus remaining less intrusive during a debug session.
196
IDCODE
SAMPLE/PRELOAD
SAMPLE
EXTEST
HIGHZ
CLAMP
EZPORT
ARM_IDCODE
BYPASS
Factory debug reserved
ARM JTAG-DP Reserved
Reserved
Instruction
1
K30 Sub-Family Reference Manual, Rev. 6, Nov 2011
1000, 1010, 1011,
0101, 0110, 0111
All other opcodes
Table 9-3. JTAG Instructions
Code[3:0]
0000
0010
0011
0100
1001
1100
1101
1110
1111
1110
Selects device identification register for shift
Selects boundary scan register for shifting, sampling, and
preloading without disturbing functional operation
Selects boundary scan register for shifting and sampling
without disturbing functional operation
Selects boundary scan register while applying preloaded
values to output pins and asserting functional reset
Selects bypass register while three-stating all output pins and
asserting functional reset
Selects bypass register while applying preloaded values to
output pins and asserting functional reset
Enables the EZPORT function for the SoC and asserts
functional reset.
ARM JTAG-DP Instruction
Selects bypass register for data operations
Intended for factory debug only
These instructions will go the ARM JTAG-DP controller.
Please look at ARM JTAG-DP documentation for more
information on these instructions.
Decoded to select bypass register
Instruction Summary
Freescale Semiconductor, Inc.