MK30DN512ZVLK10 Freescale Semiconductor, MK30DN512ZVLK10 Datasheet - Page 434

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MK30DN512ZVLK10

Manufacturer Part Number
MK30DN512ZVLK10
Description
ARM Microcontrollers - MCU KINETIS 512K SLCD
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MK30DN512ZVLK10

Core
ARM Cortex M4
Processor Series
K30
Data Bus Width
32 bit
Maximum Clock Frequency
50 MHz
Program Memory Size
512 KB
Data Ram Size
128 KB
On-chip Adc
Yes
Operating Supply Voltage
1.71 V to 3.6 V
Operating Temperature Range
- 40 C to + 105 C
Package / Case
LQFP-80
Mounting Style
SMD/SMT

Available stocks

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Part Number
Manufacturer
Quantity
Price
Part Number:
MK30DN512ZVLK10
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Memory map/register definition
The state of any given channel’s interrupt request is directly affected by writes to this
register; it is also affected by writes to the CINT register. On writes to INT, a 1 in any bit
position clears the corresponding channel’s interrupt request. A zero in any bit position
has no affect on the corresponding channel’s current interrupt status. The CINT register is
provided so the interrupt request for a single channel can easily be cleared without the
need to perform a read-modify-write sequence to the INT register.
Address: DMA_INT is 4000_8000h base + 24h offset = 4000_8024h
434
Reset
Reset
Bit
Bit
W
W
Reserved
R
R
31–16
INT15
INT14
INT13
INT12
INT11
Field
15
14
13
12
11
w1c
31
15
0
0
w1c
30
14
0
0
This read-only field is reserved and always has the value zero.
Interrupt Request 15
0
1
Interrupt Request 14
0
1
Interrupt Request 13
0
1
Interrupt Request 12
0
1
Interrupt Request 11
The interrupt request for corresponding channel is cleared
The interrupt request for corresponding channel is active
The interrupt request for corresponding channel is cleared
The interrupt request for corresponding channel is active
The interrupt request for corresponding channel is cleared
The interrupt request for corresponding channel is active
The interrupt request for corresponding channel is cleared
The interrupt request for corresponding channel is active
w1c
29
13
0
0
w1c
K30 Sub-Family Reference Manual, Rev. 6, Nov 2011
28
12
0
0
w1c
27
11
0
0
DMA_INT field descriptions
Table continues on the next page...
w1c
26
10
0
0
w1c
25
0
0
9
w1c
24
0
0
8
0
Description
w1c
23
0
0
7
w1c
22
0
0
6
w1c
21
0
0
5
w1c
20
0
0
4
Freescale Semiconductor, Inc.
w1c
19
0
0
3
w1c
18
0
0
2
w1c
17
0
0
1
w1c
16
0
0
0

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