MK30DN512ZVLK10 Freescale Semiconductor, MK30DN512ZVLK10 Datasheet - Page 817

• Manufacturer Part Number: MK30DN512ZVLK10
• Description: ARM Microcontrollers - MCU KINETIS 512K SLCD
• Manufacturer: Freescale Semiconductor

Specifications of MK30DN512ZVLK10

• Core: ARM Cortex M4
• Processor Series: K30
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 50 MHz
• Program Memory Size: 512 KB
• Data Ram Size: 128 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 1.71 V to 3.6 V
• Operating Temperature Range: - 40 C to + 105 C
• Package / Case: LQFP-80
• Mounting Style: SMD/SMT

Freescale Semiconductor, Inc.
DECAPEN2
FAULTEN2
SYNCEN2
Reserved
DECAP2
COMP2
DTEN2
Field
23
22
21
20
19
18
17
This read-only field is reserved and always has the value zero.
Fault Control Enable for n = 4
Enables the fault control in channels (n) and (n+1).
This field is write protected. It can be written only when MODE[WPDIS] = 1.
0
1
Synchronization Enable for n = 4
Enables PWM synchronization of registers C(n)V and C(n+1)V.
0
1
Deadtime Enable for n = 4
Enables the deadtime insertion in the channels (n) and (n+1).
This field is write protected. It can be written only when MODE[WPDIS] = 1.
0
1
Dual Edge Capture Mode Captures for n = 4
Enables the capture of the FTM counter value according to the channel (n) input event and the
configuration of the dual edge capture bits.
This field applies only when FTMEN = 1 and DECAPEN = 1.
DECAP bit is cleared automatically by hardware if dual edge capture – one-shot mode is selected and
when the capture of channel (n+1) event is made.
0
1
Dual Edge Capture Mode Enable for n = 4
Enables the dual edge capture mode in the channels (n) and (n+1). This bit reconfigures the function of
MSnA, ELSnB:ELSnA and ELS(n+1)B:ELS(n+1)A bits in dual edge capture mode according to
36-7.
This field applies only when FTMEN = 1.
This field is write protected. It can be written only when MODE[WPDIS] = 1.
0
1
Complement of Channel (n) for n = 4
Enables complementary mode for the combined channels. In complementary mode the channel (n+1)
output is the inverse of the channel (n) output.
This field is write protected. It can be written only when MODE[WPDIS] = 1.
The fault control in this pair of channels is disabled.
The fault control in this pair of channels is enabled.
The PWM synchronization in this pair of channels is disabled.
The PWM synchronization in this pair of channels is enabled.
The deadtime insertion in this pair of channels is disabled.
The deadtime insertion in this pair of channels is enabled.
The dual edge captures are inactive.
The dual edge captures are active.
The dual edge capture mode in this pair of channels is disabled.
The dual edge capture mode in this pair of channels is enabled.
FTMx_COMBINE field descriptions (continued)
K30 Sub-Family Reference Manual, Rev. 6, Nov 2011
Table continues on the next page...
Description
Chapter 36 FlexTimer (FTM)
Table
817