MK30DN512ZVLK10 Freescale Semiconductor, MK30DN512ZVLK10 Datasheet - Page 997

• Manufacturer Part Number: MK30DN512ZVLK10
• Description: ARM Microcontrollers - MCU KINETIS 512K SLCD
• Manufacturer: Freescale Semiconductor

Specifications of MK30DN512ZVLK10

• Core: ARM Cortex M4
• Processor Series: K30
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 50 MHz
• Program Memory Size: 512 KB
• Data Ram Size: 128 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 1.71 V to 3.6 V
• Operating Temperature Range: - 40 C to + 105 C
• Package / Case: LQFP-80
• Mounting Style: SMD/SMT

Freescale Semiconductor, Inc.
LPRIOEN
Reserved
Reserved
SRXDIS
DOZE
15–14
IRMQ
Field
AEN
19
18
17
16
13
12
NOTE: LPMACK will be asserted within 180 CAN bits from the low power mode request by the CPU,
0
1
This field is reserved.
Doze Mode Enable
This bit defines whether FlexCAN is allowed to enter low power mode when Doze Mode is requested at
MCU level. This bit is automatically reset when FlexCAN wakes up from Doze Mode upon detecting
activity on the CAN bus (self wake-up enabled).
0
1
Self Reception Disable
This bit defines whether FlexCAN is allowed to receive frames transmitted by itself. If this bit is asserted,
frames transmitted by the module will not be stored in any MB, regardless if the MB is programmed with
an ID that matches the transmitted frame, and no interrupt flag or interrupt signal will be generated due to
the frame reception. This bit can only be written in Freeze mode as it is blocked by hardware in other
modes.
0
1
Individual Rx Masking and Queue Enable
This bit indicates whether Rx matching process will be based either on individual masking and queue or
on masking scheme with RXMGMASK, RX14MASK and RX15MASK, RXFGMASK. This bit can only be
written in Freeze mode as it is blocked by hardware in other modes.
0
1
This read-only field is reserved and always has the value zero.
Local Priority Enable
This bit is provided for backwards compatibility reasons. It controls whether the local priority feature is
enabled or not. It is used to expand the ID used during the arbitration process. With this expanded ID
concept, the arbitration process is done based on the full 32-bit word, but the actual transmitted ID still
has 11-bit for standard frames and 29-bit for extended frames. This bit can only be written in Freeze mode
as it is blocked by hardware in other modes.
0
1
Abort Enable
This bit is supplied for backwards compatibility reasons. When asserted, it enables the Tx abort
mechanism. This mechanism guarantees a safe procedure for aborting a pending transmission, so that no
FlexCAN is not in a low power mode.
FlexCAN is in a low power mode.
FlexCAN is not enabled to enter low power mode when Doze Mode is requested.
FlexCAN is enabled to enter low power mode when Doze Mode is requested.
Self reception enabled
Self reception disabled
Individual Rx masking and queue feature are disabled. For backward compatibility, the reading of C/S
word locks the MB even if it is EMPTY.
Individual Rx masking and queue feature are enabled.
Local Priority disabled
Local Priority enabled
and negated within 2 CAN bits after the low power mode request removal (see Section "Protocol
Timing").
K30 Sub-Family Reference Manual, Rev. 6, Nov 2011
CANx_MCR field descriptions (continued)
Table continues on the next page...
Description
Chapter 41 CAN (FlexCAN)
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