MK30DN512ZVLK10 Freescale Semiconductor, MK30DN512ZVLK10 Datasheet - Page 832

• Manufacturer Part Number: MK30DN512ZVLK10
• Description: ARM Microcontrollers - MCU KINETIS 512K SLCD
• Manufacturer: Freescale Semiconductor

Specifications of MK30DN512ZVLK10

• Core: ARM Cortex M4
• Processor Series: K30
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 50 MHz
• Program Memory Size: 512 KB
• Data Ram Size: 128 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 1.71 V to 3.6 V
• Operating Temperature Range: - 40 C to + 105 C
• Package / Case: LQFP-80
• Mounting Style: SMD/SMT

Memory Map and Register Definition
832
QUADMODE
QUADEN
PHBPOL
QUADIR
TOFDIR
Field
4
3
2
1
0
0
1
Phase B Input Polarity
Selects the polarity for the quadrature decoder phase B input.
0
1
Quadrature Decoder Mode
Selects the encoding mode used in the quadrature decoder mode.
0
1
FTM Counter Direction in Quadrature Decoder Mode
Indicates the counting direction.
0
1
Timer Overflow Direction in Quadrature Decoder Mode
Indicates if the TOF bit was set on the top or the bottom of counting.
0
1
Quadrature Decoder Mode Enable
Enables the quadrature decoder mode. In this mode, the phase A and B input signals control the FTM
counter direction. The quadrature decoder mode has precedence over the other modes. (See
36-7.)
This field is write protected. It can be written only when MODE[WPDIS] = 1.
0
1
Normal polarity. Phase A input signal is not inverted before identifying the rising and falling edges of
this signal.
Inverted polarity. Phase A input signal is inverted before identifying the rising and falling edges of this
signal.
Normal polarity. Phase B input signal is not inverted before identifying the rising and falling edges of
this signal.
Inverted polarity. Phase B input signal is inverted before identifying the rising and falling edges of this
signal.
Phase A and phase B encoding mode.
Count and direction encoding mode.
Counting direction is decreasing (FTM counter decrement).
Counting direction is increasing (FTM counter increment).
TOF bit was set on the bottom of counting. There was an FTM counter decrement and FTM counter
changes from its minimum value (CNTIN register) to its maximum value (MOD register).
TOF bit was set on the top of counting. There was an FTM counter increment and FTM counter
changes from its maximum value (MOD register) to its minimum value (CNTIN register).
Quadrature decoder mode is disabled.
Quadrature decoder mode is enabled.
FTMx_QDCTRL field descriptions (continued)
K30 Sub-Family Reference Manual, Rev. 6, Nov 2011
Description
Freescale Semiconductor, Inc.
Table