MK30DN512ZVLK10 Freescale Semiconductor, MK30DN512ZVLK10 Datasheet - Page 1189

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MK30DN512ZVLK10

Manufacturer Part Number
MK30DN512ZVLK10
Description
ARM Microcontrollers - MCU KINETIS 512K SLCD
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MK30DN512ZVLK10

Core
ARM Cortex M4
Processor Series
K30
Data Bus Width
32 bit
Maximum Clock Frequency
50 MHz
Program Memory Size
512 KB
Data Ram Size
128 KB
On-chip Adc
Yes
Operating Supply Voltage
1.71 V to 3.6 V
Operating Temperature Range
- 40 C to + 105 C
Package / Case
LQFP-80
Mounting Style
SMD/SMT

Available stocks

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Manufacturer
Quantity
Price
Part Number:
MK30DN512ZVLK10
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44.3.21 UART FIFO Receive Watermark (UARTx_RWFIFO)
This register provides the ability to set a programmable threshold for notification of
needing to remove data from the receiver buffer/FIFO. This register may be read at any
time but should only be written when C2[RE] is not asserted. Changing the value in this
register will not clear the S1[RDRF] flag.
Addresses: UART0_RWFIFO is 4006_A000h base + 15h offset = 4006_A015h
Freescale Semiconductor, Inc.
RXWATER
TXCOUNT
Field
Reset
Field
7–0
Read
7–0
Write
Bit
UART1_RWFIFO is 4006_B000h base + 15h offset = 4006_B015h
UART2_RWFIFO is 4006_C000h base + 15h offset = 4006_C015h
UART3_RWFIFO is 4006_D000h base + 15h offset = 4006_D015h
Transmit Counter
The value in this register indicates the number of datawords that are in the transmit buffer/FIFO. If a
dataword is in the process of being transmitted (i.e. in the transmit shift register) it is not included in the
count. This value may be used in conjunction with the PFIFO[TXFIFOSIZE] field to calculate how much
room is left in the transmit buffer/FIFO.
Receive Watermark
When the number of datawords in the Receive FIFO/buffer is equal to or greater than the value in this
register field the event is flagged. An interrupt via S1[RDRF] or a DMA request via C5[RDMAS] will be
generated as determined by C5[RDMAS] and C2[RIE] fields. For proper operation the value in the
RXWATER field must be set to be less than the size of the Receive buffer/FIFO size as indicated by
PFIFO[RXFIFOSIZE] and PFIFO[RXFE] and greater than 0.
7
0
K30 Sub-Family Reference Manual, Rev. 6, Nov 2011
0
6
UARTx_RWFIFO field descriptions
UARTx_TCFIFO field descriptions
0
5
Chapter 44 Universal Asynchronous Receiver/Transmitter (UART)
0
4
RXWATER
Description
Description
0
3
0
2
0
1
1
0
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