MK30DN512ZVLK10 Freescale Semiconductor, MK30DN512ZVLK10 Datasheet - Page 971

• Manufacturer Part Number: MK30DN512ZVLK10
• Description: ARM Microcontrollers - MCU KINETIS 512K SLCD
• Manufacturer: Freescale Semiconductor

Specifications of MK30DN512ZVLK10

• Core: ARM Cortex M4
• Processor Series: K30
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 50 MHz
• Program Memory Size: 512 KB
• Data Ram Size: 128 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 1.71 V to 3.6 V
• Operating Temperature Range: - 40 C to + 105 C
• Package / Case: LQFP-80
• Mounting Style: SMD/SMT

Reset
40.2.4 RTC Time Compensation Register (RTC_TCR)
Address: RTC_TCR is 4003_D000h base + Ch offset = 4003_D00Ch
Freescale Semiconductor, Inc.
Bit
W
R
31
0
31–24
23–16
15–8
Field
Field
TCV
TCR
CIC
CIR
7–0
30
0
29
0
28
0
CIC
When the time counter is enabled, the SR[TAF] is set whenever the TAR[TAR] equals the TSR[TSR] and
the TSR[TSR] increments. Writing to the TAR clears the SR[TAF].
Compensation Interval Counter
Current value of the compensation interval counter. If the compensation interval counter equals zero then
it is loaded with the contents of the CIR. If the CIC does not equal zero then it is decremented once a
second.
Time Compensation Value
Current value used by the compensation logic for the present second interval. Updated once a second if
the CIC equals 0 with the contents of the TCR field. If the CIC does not equal zero then it is loaded with
zero (compensation is not enabled for that second increment).
Compensation Interval Register
Configures the compensation interval in seconds from 1 to 256 to control how frequently the TCR should
adjust the number of 32.768 kHz cycles in each second. The value written should be one less than the
number of seconds (for example, write zero to configure for a compensation interval of one second). This
register is double buffered and writes do not take affect until the end of the current compensation interval.
Time Compensation Register
Configures the number of 32.768 kHz clock cycles in each second. This register is double buffered and
writes do not take affect until the end of the current compensation interval.
80h
...
FFh
00h
01h
...
7Fh
27
0
26
0
Time prescaler register overflows every 32896 clock cycles.
...
Time prescaler register overflows every 32769 clock cycles.
Time prescaler register overflows every 32768 clock cycles.
Time prescaler register overflows every 32767 clock cycles.
...
Time prescaler register overflows every 32641 clock cycles.
25
0
24
0
K30 Sub-Family Reference Manual, Rev. 6, Nov 2011
RTC_TAR field descriptions (continued)
23
0
22
0
21
RTC_TCR field descriptions
0
20
0
TCV
19
0
18
0
17
0
16
0
15
0
Description
Description
14
0
13
0
12
0
CIR
11
0
10
0
0
9
Chapter 40 Real Time Clock (RTC)
0
8
0
7
0
6
0
5
4
0
TCR
0
3
0
2
0
1
971
0
0