MK30DN512ZVLK10 Freescale Semiconductor, MK30DN512ZVLK10 Datasheet - Page 1190

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MK30DN512ZVLK10

Manufacturer Part Number
MK30DN512ZVLK10
Description
ARM Microcontrollers - MCU KINETIS 512K SLCD
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MK30DN512ZVLK10

Core
ARM Cortex M4
Processor Series
K30
Data Bus Width
32 bit
Maximum Clock Frequency
50 MHz
Program Memory Size
512 KB
Data Ram Size
128 KB
On-chip Adc
Yes
Operating Supply Voltage
1.71 V to 3.6 V
Operating Temperature Range
- 40 C to + 105 C
Package / Case
LQFP-80
Mounting Style
SMD/SMT

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MK30DN512ZVLK10
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Memory map and registers
44.3.22 UART FIFO Receive Count (UARTx_RCFIFO)
This is a read only register that indicates how many datawords are currently in the receive
buffer/FIFO. It may be read at anytime.
Addresses: UART0_RCFIFO is 4006_A000h base + 16h offset = 4006_A016h
44.3.23 UART 7816 Control Register (UARTx_C7816)
The C7816 register is the primary control register for ISO-7816 specific functionality.
This register is specific to 7816 functionality and the values in this register have no effect
on UART operation and should be ignored if ISO_7816E is not set/enabled. This register
may be read at anytime but values should only be changed when the ISO_7816E bit is not
set.
Addresses: UART0_C7816 is 4006_A000h base + 18h offset = 4006_A018h
1190
RXCOUNT
Reset
Field
Reset
Read
7–0
Read
Write
Write
Bit
Bit
UART1_RCFIFO is 4006_B000h base + 16h offset = 4006_B016h
UART2_RCFIFO is 4006_C000h base + 16h offset = 4006_C016h
UART3_RCFIFO is 4006_D000h base + 16h offset = 4006_D016h
UART1_C7816 is 4006_B000h base + 18h offset = 4006_B018h
UART2_C7816 is 4006_C000h base + 18h offset = 4006_C018h
UART3_C7816 is 4006_D000h base + 18h offset = 4006_D018h
Receive Counter
The value in this register indicates the number of datawords that are in the receive buffer/FIFO. If a
dataword is in the process of being received (i.e. in the receive shift register) it is not included in the
count. This value may be used in conjunction with the PFIFO[RXFIFOSIZE] field to calculate how much
room is left in the receive buffer/FIFO.
7
0
7
0
K30 Sub-Family Reference Manual, Rev. 6, Nov 2011
0
0
0
6
6
UARTx_RCFIFO field descriptions
0
0
5
5
ONACK
0
0
4
4
RXCOUNT
Description
ANACK
0
0
3
3
INIT
0
0
2
2
Freescale Semiconductor, Inc.
TTYPE
0
0
1
1
ISO_7816E
0
0
0
0

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