MK30DN512ZVLK10 Freescale Semiconductor, MK30DN512ZVLK10 Datasheet - Page 1506

• Manufacturer Part Number: MK30DN512ZVLK10
• Description: ARM Microcontrollers - MCU KINETIS 512K SLCD
• Manufacturer: Freescale Semiconductor

Specifications of MK30DN512ZVLK10

• Core: ARM Cortex M4
• Processor Series: K30
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 50 MHz
• Program Memory Size: 512 KB
• Data Ram Size: 128 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 1.71 V to 3.6 V
• Operating Temperature Range: - 40 C to + 105 C
• Package / Case: LQFP-80
• Mounting Style: SMD/SMT

Functional description
49.4.6 Interrupts
When an LCD controller frame-frequency interrupt event occurs, the LCDIF bit in the
AR is asserted. The LCDIF bit remains asserted until software clears the LCD controller
frame frequency interrupt. The interrupt can be cleared by software writing a 1 to the
LCDIF bit. The LCD controller frame frequency interrupt is not available in all low
power modes.
If both the LCDIF bit in the AR and the LCDIEN bit in the GCR are set, an LCD
interrupt signal asserts.
When a fault detection complete event occurs, FDCF bit is set. the FDCF bit remains
asserted until software writes 1 to clear. if both FDCF and FDCIEN bits are set, an LCD
interrupt signal is asserted.
49.4.7 LCD display fault detect circuit
Most failures, where a LCD segment is either unexpectedly on or off, result in an
erroneous information that can mislead a user and cause a dangerous situation. The LCD
Display Fault Detect circuit's (LFD) function finds faults in the LCD display, display
connector, and board connections between the MCU and the display.
The LCD panel could be regarded as a matrix of segments, as shown in the following
figures. Any open/short connection changes the capacitive characteristics of the segment
matrix . The pullup fault detection checks the capacitive characteristic of an LCD_Pn pin
by applying a weak pullup voltage to the display capacitor matrix. The rise time response
is sampled and summed within a user defined time frame and stored for postprocessing in
the FDSR[FDCNT] bitfield. The summing of the digitized values uses the principle that
the response of a capacitor for each charge/discharge is constant for the same loading
conditions.
K30 Sub-Family Reference Manual, Rev. 6, Nov 2011
1506
Freescale Semiconductor, Inc.