MK30DN512ZVLK10 Freescale Semiconductor, MK30DN512ZVLK10 Datasheet - Page 369

• Manufacturer Part Number: MK30DN512ZVLK10
• Description: ARM Microcontrollers - MCU KINETIS 512K SLCD
• Manufacturer: Freescale Semiconductor

Specifications of MK30DN512ZVLK10

• Core: ARM Cortex M4
• Processor Series: K30
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 50 MHz
• Program Memory Size: 512 KB
• Data Ram Size: 128 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 1.71 V to 3.6 V
• Operating Temperature Range: - 40 C to + 105 C
• Package / Case: LQFP-80
• Mounting Style: SMD/SMT

Chapter 19
Peripheral Bridge (AIPS-Lite)
19.1 Introduction
The peripheral bridge (AIPS-Lite) converts the crossbar switch interface to an interface to
access a majority of peripherals on the device.
The peripheral bridge supports up to 128 peripherals. The peripheral bridge occupies a 64
MB portion of the address space. The bridge includes separate clock enable inputs for
each of the slots to accommodate slower peripherals.
19.1.1 Features
Key features of the peripheral bridge are:
19.1.2 General operation
The peripherals connected to the peripheral bridge are modules that contain readable/
writable control and status registers. The system masters read and write these registers
through the peripheral bridge. The peripheral bridge generates module enables, the
Freescale Semiconductor, Inc.
• Supports up to 128 peripherals
• Supports 8-, 16-, and 32-bit width peripheral slots
• Each independently configurable peripheral includes a clock enable, which allows
• Programming model provides memory protection functionality
peripherals to operate at any speed less than the system clock rate.
For the chip-specific implementation details of this module's
instances see the chip configuration chapter.
K30 Sub-Family Reference Manual, Rev. 6, Nov 2011
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